[PATCH] x86: Add Evw to emit w suffix for several instrctions for word ptr
Jan Beulich
jbeulich@suse.com
Tue May 30 08:09:36 GMT 2023
On 29.05.2023 04:08, Jiang, Haochen wrote:
>>>>>> Currently, for instructions lldt/ltr/verr/verw/lkgs, we are
>>>>>> missing w suffix for memory operands like sldt/str do. Also the Ew
>>>>>> usage is not that precise under this scenario. Add Evw to fix this
>> problem.
>>>>>
>>>>> So why not Sv? It's used solely for segment register moves, sldt,
>>>>> str, and smsw right now. We're aiming for consistency among all
>>>>> insns loading / storing segment selector values (and smsw fits that
>>>>> pattern, but note that lmsw does not), so introducing a new Evw
>>>>> can't be the solution (or else Sv users would also need switching).
>>>>
>>>> There is a little difference between lldt/ltr/lkgs/verr/verw and
>>>> sldt/str. We need to fix the register to 16 bit while sldt/str did
>>>> not. That is why I am not using Sv. Sv will emit 'lldt %eax' but not
>>>> 'lldt %ax' for current testcases and I suppose that is not desired.
>>>
>>> Did you read my reply on one of the "Support Intel FRED LKGS" threads,
>>> which I think I sent before this patch was sent? I do not follow why
>>> you think "we need to fix the register to 16 bit".
>>
>> Maybe I got some wrong understanding on that. It comes from the current
>> testcase.
>> Trying to clarify that on disassembler.
>>
>> Let's take lldt as example. Will 0f00d2 emit eax register or ax register for lldt?
>
> One thing to add the current behavior for disassembler or trunk is to emit ax
> register. Which I mean always is to as always with other instructions.
I'm afraid I don't really get what you concern is. Yes, ...
>> If we need a 66 in bytecode to emit ax register as always, Sv+D fits the need.
>> And then the only thing we might need to do is to adjust the current testcase.
... some existing disassembly testcases will likely need adjusting.
Jan
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