[RFC PATCH 3/4] RISC-V : Add rv64 ilp32 support in disassemble

[Liao Shihua]

This patch supports rv64 ilp32 in disassemble.


opcodes/ChangeLog:

        * riscv-dis.c (print_insn_args):
        (riscv_disassemble_insn):
---
 opcodes/riscv-dis.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index f25993d1e45..550cabf875e 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -263,7 +263,7 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info
 	    case 'j':
 	      if (((l & MASK_C_ADDI) == MATCH_C_ADDI) && rd != 0)
 		maybe_print_address (pd, rd, EXTRACT_CITYPE_IMM (l), 0);
-	      if (info->mach == bfd_mach_riscv64
+	      if ((info->mach == bfd_mach_riscv64 || info->mach == bfd_mach_riscv64x32)
 		  && ((l & MASK_C_ADDIW) == MATCH_C_ADDIW) && rd != 0)
 		maybe_print_address (pd, rd, EXTRACT_CITYPE_IMM (l), 1);
 	      print (info->stream, dis_style_immediate, "%d",
@@ -463,7 +463,7 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info
 	  if (((l & MASK_ADDI) == MATCH_ADDI && rs1 != 0)
 	      || (l & MASK_JALR) == MATCH_JALR)
 	    maybe_print_address (pd, rs1, EXTRACT_ITYPE_IMM (l), 0);
-	  if (info->mach == bfd_mach_riscv64
+	  if ((info->mach == bfd_mach_riscv64 || info->mach == bfd_mach_riscv64x32)
 	      && ((l & MASK_ADDIW) == MATCH_ADDIW) && rs1 != 0)
 	    maybe_print_address (pd, rs1, EXTRACT_ITYPE_IMM (l), 1);
 	  print (info->stream, dis_style_immediate, "%d",
@@ -724,7 +724,7 @@ riscv_disassemble_insn (bfd_vma memaddr,
   if (op != NULL)
     {
       /* If XLEN is not known, get its value from the ELF class.  */
-      if (info->mach == bfd_mach_riscv64)
+      if (info->mach == bfd_mach_riscv64 || info->mach == bfd_mach_riscv64x32)
 	xlen = 64;
       else if (info->mach == bfd_mach_riscv32)
 	xlen = 32;
-- 
2.38.1.windows.1