[PATCH v1 1/2] LoongArch: gas: Add LVZ and LBT instructions support
WANG Xuerui
i.swmail@xen0n.name
Fri Jun 30 03:52:11 GMT 2023
Hi,
On 6/30/23 11:34, mengqinggang wrote:
> [snip]
> +static struct loongarch_opcode loongarch_lbt_opcodes[] =
> +{
> + /* match, mask, name, format, macro, include, exclude, pinfo. */
> + {0x00000800, 0xfffffc1c, "movgr2scr", "cr0:2,r5:5", 0, 0, 0, 0},
> + {0x00000c00, 0xffffff80, "movscr2gr", "r0:5,cr5:2", 0, 0, 0, 0},
Thanks for amending these two!
> [snip]
> + {0x00368000, 0xffffc3e0, "setx86j", "r0:5,u10:4", 0, 0, 0, 0},
> + {0x00007800, 0xfffffc00, "setx86loope", "r0:5,r5:5", 0, 0, 0, 0},
> + {0x00007c00, 0xfffffc00, "setx86loopne", "r0:5,r5:5", 0, 0, 0, 0},
But what about these three? "x86set..." could be more consistent,
especially given "x86settm" is also around. I didn't notice this in my
first review but I've mentioned this part in another reply.
> [snip]
> + {0x0036c000, 0xffffc3e0, "setarmj", "r0:5,u10:4", 0, 0, 0, 0},
Also here (renaming this to "armsetj" would make the LBT/ARM instruction
names entirely consistent).
More information about the Binutils
mailing list