[PATCH 0/1] riscv: Ensure LE instruction fetching

[Branislav Brzak]

Currently riscv gdb code looks at arch byte order
when fetching instructions. This works when the
target is LE, but on BE arch it will byte swap the
instruction, while the riscv spec defines all
instructions are LE encoded regardless of
system memory endianess.

Branislav Brzak (1):
gdb/riscv: Ensure LE instruction fetching

gdb/riscv-tdep.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

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