[PATCH v2] Support Intel SM3

[Jiang, Haochen]

> On 18.07.2023 10:09, Haochen Jiang wrote:
> > --- /dev/null
> > +++ b/gas/testsuite/gas/i386/sm3.s
> > @@ -0,0 +1,37 @@
> > +# Check 32bit SM3 instructions
> > +
> > +	.allow_index_reg
> > +	.text
> > +_start:
> > +	vsm3msg1	%xmm4, %xmm5, %xmm6	 #SM3
> > +	vsm3msg1	0x10000000(%esp, %esi, 8), %xmm5, %xmm6	 #SM3
> > +	vsm3msg1	(%ecx), %xmm5, %xmm6	 #SM3
> > +	vsm3msg1	2032(%ecx), %xmm5, %xmm6	 #SM3
> Disp32(f0070000)
> > +	vsm3msg1	-2048(%edx), %xmm5, %xmm6	 #SM3
> Disp32(00f8ffff)
> 

My final patch will delete these Disp32 lines based on SHA512 comments. Also same
for SM4 patch.

After H.J. gives his opinion on the "#as:" in the beginning and ".allow_index_reg",
I will commit all the patches. However, I suppose it should not be a blocking
issue since if we want to delete those, another patch to deal with all the
testcases is needed.

Thx,
Haochen

> The numbers in parentheses are odd. I'd prefer if they were omitted,
> but I'd also be okay of you flipped their byte order so they properly
> correspond (as numbers) to the displacements used.