[PATCH v2] Support Intel SHA512

Jiang, Haochen haochen.jiang@intel.com
Tue Jul 18 07:59:39 GMT 2023


> diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index
> 6ad7d6951db..70843eb251f 100644
> --- a/opcodes/i386-gen.c
> +++ b/opcodes/i386-gen.c
> @@ -214,6 +214,8 @@ static const dependency isa_dependencies[] =
>      "XSAVE" },
>    { "SHA",
>      "SSE2" },
> +  { "SHA512",
> +    "AVX2" },
>    { "XSAVES",
>      "XSAVEC" },
>    { "XSAVEC",
> @@ -369,6 +371,7 @@ static bitfield cpu_flags[] =
>    BITFIELD (RAO_INT),
>    BITFIELD (FRED),
>    BITFIELD (LKGS),
> +  BITFIELD (SHA512),

Oops, I sent an outdated patch here, it should have also been moved next to SHA.

You could see that in SM3/SM4 patches.

Thx,
Haochen

>    BITFIELD (MWAITX),
>    BITFIELD (CLZERO),
>    BITFIELD (OSPKE),



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