[PATCH 4/5] Support Intel SM4
Jan Beulich
jbeulich@suse.com
Thu Jul 13 10:25:25 GMT 2023
On 13.07.2023 08:33, Haochen Jiang wrote:
> --- a/opcodes/i386-dis.c
> +++ b/opcodes/i386-dis.c
> @@ -1070,7 +1070,7 @@ enum
> PREFIX_VEX_0F38CB,
> PREFIX_VEX_0F38CC,
> PREFIX_VEX_0F38CD,
> - PREFIX_VEX_0F38DA_W_0_L_0,
> + PREFIX_VEX_0F38DA_W_0,
> PREFIX_VEX_0F38F5_L_0,
> PREFIX_VEX_0F38F6_L_0,
> PREFIX_VEX_0F38F7_L_0,
> @@ -1316,7 +1316,8 @@ enum
> VEX_LEN_0F38CB_P_3_W_0,
> VEX_LEN_0F38CC_P_3_W_0,
> VEX_LEN_0F38CD_P_3_W_0,
> - VEX_LEN_0F38DA_W_0,
> + VEX_LEN_0F38DA_W_0_P_0,
> + VEX_LEN_0F38DA_W_0_P_2,
> VEX_LEN_0F38DB,
> VEX_LEN_0F38F2,
> VEX_LEN_0F38F3,
> @@ -3969,11 +3970,12 @@ static const struct dis386 prefix_table[][4] = {
> { VEX_W_TABLE (VEX_W_0F38CD_P_3) },
> },
>
> - /* PREFIX_VEX_0F38DA_W_0_L_0 */
> + /* PREFIX_VEX_0F38DA_W_0 */
> {
> - { "vsm3msg1", { XM, Vex, EXxmm }, 0 },
> - { Bad_Opcode },
> - { "vsm3msg2", { XM, Vex, EXxmm }, 0 },
> + { VEX_LEN_TABLE (VEX_LEN_0F38DA_W_0_P_0) },
> + { "vsm4key4", { XM, Vex, EXx }, 0 },
> + { VEX_LEN_TABLE (VEX_LEN_0F38DA_W_0_P_2) },
> + { "vsm4rnds4", { XM, Vex, EXx }, 0 },
> },
>
> /* PREFIX_VEX_0F38F5_L_0 */
> @@ -7010,9 +7012,14 @@ static const struct dis386 vex_len_table[][2] = {
> { "vsha512msg2", { XM, Uymm }, 0 },
> },
>
> - /* VEX_LEN_0F38DA_W_0 */
> + /* VEX_LEN_0F38DA_W_0_P_0 */
> + {
> + { "vsm3msg1", { XM, Vex, EXxmm }, 0 },
> + },
> +
> + /* VEX_LEN_0F38DA_W_0_P_2 */
> {
> - { PREFIX_TABLE (PREFIX_VEX_0F38DA_W_0_L_0) },
> + { "vsm3msg2", { XM, Vex, EXxmm }, 0 },
> },
>
> /* VEX_LEN_0F38DB */
> @@ -7716,7 +7723,7 @@ static const struct dis386 vex_w_table[][2] = {
> },
> {
> /* VEX_W_0F38DA */
> - { VEX_LEN_TABLE (VEX_LEN_0F38DA_W_0) },
> + { PREFIX_TABLE (PREFIX_VEX_0F38DA_W_0) },
> },
> {
> /* VEX_W_0F3A00_L_1 */
I think it would be nice if this patch didn't need to re-do what the
immediately preceding patch does. Can that earlier patch be adjusted
to the final intended decode order?
Some of the comments given for earlier patches also apply here, ftaod.
Jan
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