[PATCH] RISC-V: Reduce effective linker relaxation passses

[Tsukasa OI]

From: Tsukasa OI <research_trasio@irq.a4lg.com>

Commit 43025f01a0c9 ("RISC-V: Improve link time complexity.") reduced the
time complexity of the linker relaxation but some code portions did not
reflect this change.

This commit fixes a comment describing each relaxation pass and reduces
actual number of passes for the RISC-V linker relaxation from 3 to 2.
Though it does not change the functionality, it marginally improves the
performance while linking large programs (with many relocations).

bfd/ChangeLog:

	* elfnn-riscv.c (_bfd_riscv_relax_section): Fix a comment to
	reflect current roles of each relaxation pass.

ld/ChangeLog:

	* emultempl/riscvelf.em: Reduce the number of linker relaxation
	from 3 to 2.
---
 bfd/elfnn-riscv.c        | 6 +++---
 ld/emultempl/riscvelf.em | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
index 4a5da7df3fe9..c2604de0050d 100644
--- a/bfd/elfnn-riscv.c
+++ b/bfd/elfnn-riscv.c
@@ -4754,9 +4754,9 @@ bfd_elfNN_riscv_set_data_segment_info (struct bfd_link_info *info,
 
 /* Relax a section.
 
-   Pass 0: Shortens code sequences for LUI/CALL/TPREL/PCREL relocs.
-   Pass 1: Deletes the bytes that PCREL relaxation in pass 0 made obsolete.
-   Pass 2: Which cannot be disabled, handles code alignment directives.  */
+   Pass 0: Shortens code sequences for LUI/CALL/TPREL/PCREL relocs and
+	   deletes the obsolete bytes.
+   Pass 1: Which cannot be disabled, handles code alignment directives.  */
 
 static bool
 _bfd_riscv_relax_section (bfd *abfd, asection *sec,
diff --git a/ld/emultempl/riscvelf.em b/ld/emultempl/riscvelf.em
index b7435d6fb620..b12d15065c4d 100644
--- a/ld/emultempl/riscvelf.em
+++ b/ld/emultempl/riscvelf.em
@@ -42,7 +42,7 @@ riscv_elf_before_allocation (void)
 	ENABLE_RELAXATION;
     }
 
-  link_info.relax_pass = 3;
+  link_info.relax_pass = 2;
 }
 
 static void

base-commit: fe8cdc8ec145a166414fc375cf2cb65d9a8085a1
-- 
2.39.1