[PATCH][Binutils] aarch64: Add FEAT_THE RCWCAS instructions.
Srinath Parvathaneni
srinath.parvathaneni@arm.com
Wed Dec 20 09:32:05 GMT 2023
Hi,
This patch adds support for FEAT_THE Read Check Write Compare
and Swap (RCWCAS, RCWCASA, RCWCASAL and RCWCASL) instructions
under the +the flag.
Regression testing for aarch64-none-elf target and
found no regressions.
Ok for binutils-master?
Regards,
Srinath.
-------------- next part --------------
diff --git a/gas/testsuite/gas/aarch64/the-1.d b/gas/testsuite/gas/aarch64/the-1.d
new file mode 100644
index 0000000000000000000000000000000000000000..545e410dbee9270d0f7953df50cbc2cc5c06f992
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/the-1.d
@@ -0,0 +1,90 @@
+#name: Test of Read Check Write Compare and Swap Instructions.
+#as: -march=armv9.4-a+the
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+.*: 19200a21 rcwcas x0, x1, \[x17\]
+.*: 19200b61 rcwcas x0, x1, \[x27\]
+.*: 19200a35 rcwcas x0, x21, \[x17\]
+.*: 19200b75 rcwcas x0, x21, \[x27\]
+.*: 192a0a21 rcwcas x10, x1, \[x17\]
+.*: 192a0b61 rcwcas x10, x1, \[x27\]
+.*: 192a0a35 rcwcas x10, x21, \[x17\]
+.*: 192a0b75 rcwcas x10, x21, \[x27\]
+.*: 192f0a21 rcwcas x15, x1, \[x17\]
+.*: 192f0b61 rcwcas x15, x1, \[x27\]
+.*: 192f0a35 rcwcas x15, x21, \[x17\]
+.*: 192f0b75 rcwcas x15, x21, \[x27\]
+.*: 19340a21 rcwcas x20, x1, \[x17\]
+.*: 19340b61 rcwcas x20, x1, \[x27\]
+.*: 19340a35 rcwcas x20, x21, \[x17\]
+.*: 19340b75 rcwcas x20, x21, \[x27\]
+.*: 19390a21 rcwcas x25, x1, \[x17\]
+.*: 19390b61 rcwcas x25, x1, \[x27\]
+.*: 19390a35 rcwcas x25, x21, \[x17\]
+.*: 19390b75 rcwcas x25, x21, \[x27\]
+.*: 19a00a21 rcwcasa x0, x1, \[x17\]
+.*: 19a00b61 rcwcasa x0, x1, \[x27\]
+.*: 19a00a35 rcwcasa x0, x21, \[x17\]
+.*: 19a00b75 rcwcasa x0, x21, \[x27\]
+.*: 19aa0a21 rcwcasa x10, x1, \[x17\]
+.*: 19aa0b61 rcwcasa x10, x1, \[x27\]
+.*: 19aa0a35 rcwcasa x10, x21, \[x17\]
+.*: 19aa0b75 rcwcasa x10, x21, \[x27\]
+.*: 19af0a21 rcwcasa x15, x1, \[x17\]
+.*: 19af0b61 rcwcasa x15, x1, \[x27\]
+.*: 19af0a35 rcwcasa x15, x21, \[x17\]
+.*: 19af0b75 rcwcasa x15, x21, \[x27\]
+.*: 19b40a21 rcwcasa x20, x1, \[x17\]
+.*: 19b40b61 rcwcasa x20, x1, \[x27\]
+.*: 19b40a35 rcwcasa x20, x21, \[x17\]
+.*: 19b40b75 rcwcasa x20, x21, \[x27\]
+.*: 19b90a21 rcwcasa x25, x1, \[x17\]
+.*: 19b90b61 rcwcasa x25, x1, \[x27\]
+.*: 19b90a35 rcwcasa x25, x21, \[x17\]
+.*: 19b90b75 rcwcasa x25, x21, \[x27\]
+.*: 19e00a21 rcwcasal x0, x1, \[x17\]
+.*: 19e00b61 rcwcasal x0, x1, \[x27\]
+.*: 19e00a35 rcwcasal x0, x21, \[x17\]
+.*: 19e00b75 rcwcasal x0, x21, \[x27\]
+.*: 19ea0a21 rcwcasal x10, x1, \[x17\]
+.*: 19ea0b61 rcwcasal x10, x1, \[x27\]
+.*: 19ea0a35 rcwcasal x10, x21, \[x17\]
+.*: 19ea0b75 rcwcasal x10, x21, \[x27\]
+.*: 19ef0a21 rcwcasal x15, x1, \[x17\]
+.*: 19ef0b61 rcwcasal x15, x1, \[x27\]
+.*: 19ef0a35 rcwcasal x15, x21, \[x17\]
+.*: 19ef0b75 rcwcasal x15, x21, \[x27\]
+.*: 19f40a21 rcwcasal x20, x1, \[x17\]
+.*: 19f40b61 rcwcasal x20, x1, \[x27\]
+.*: 19f40a35 rcwcasal x20, x21, \[x17\]
+.*: 19f40b75 rcwcasal x20, x21, \[x27\]
+.*: 19f90a21 rcwcasal x25, x1, \[x17\]
+.*: 19f90b61 rcwcasal x25, x1, \[x27\]
+.*: 19f90a35 rcwcasal x25, x21, \[x17\]
+.*: 19f90b75 rcwcasal x25, x21, \[x27\]
+.*: 19600a21 rcwcasl x0, x1, \[x17\]
+.*: 19600b61 rcwcasl x0, x1, \[x27\]
+.*: 19600a35 rcwcasl x0, x21, \[x17\]
+.*: 19600b75 rcwcasl x0, x21, \[x27\]
+.*: 196a0a21 rcwcasl x10, x1, \[x17\]
+.*: 196a0b61 rcwcasl x10, x1, \[x27\]
+.*: 196a0a35 rcwcasl x10, x21, \[x17\]
+.*: 196a0b75 rcwcasl x10, x21, \[x27\]
+.*: 196f0a21 rcwcasl x15, x1, \[x17\]
+.*: 196f0b61 rcwcasl x15, x1, \[x27\]
+.*: 196f0a35 rcwcasl x15, x21, \[x17\]
+.*: 196f0b75 rcwcasl x15, x21, \[x27\]
+.*: 19740a21 rcwcasl x20, x1, \[x17\]
+.*: 19740b61 rcwcasl x20, x1, \[x27\]
+.*: 19740a35 rcwcasl x20, x21, \[x17\]
+.*: 19740b75 rcwcasl x20, x21, \[x27\]
+.*: 19790a21 rcwcasl x25, x1, \[x17\]
+.*: 19790b61 rcwcasl x25, x1, \[x27\]
+.*: 19790a35 rcwcasl x25, x21, \[x17\]
+.*: 19790b75 rcwcasl x25, x21, \[x27\]
diff --git a/gas/testsuite/gas/aarch64/the-1.s b/gas/testsuite/gas/aarch64/the-1.s
new file mode 100644
index 0000000000000000000000000000000000000000..ad032451e267b1d710333f72b1aade0faf692f61
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/the-1.s
@@ -0,0 +1,10 @@
+ .text
+ .irp op rcwcas, rcwcasa, rcwcasal, rcwcasl
+ .irp reg1 x0, x10, x15, x20, x25
+ .irp reg2 x1, x21
+ .irp reg3 x17, x27
+ \op \reg1, \reg2, [\reg3]
+ .endr
+ .endr
+ .endr
+ .endr
diff --git a/gas/testsuite/gas/aarch64/the-bad-1.d b/gas/testsuite/gas/aarch64/the-bad-1.d
new file mode 100644
index 0000000000000000000000000000000000000000..5e46f2d7a416827335947e1c03bf76801eed60fb
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/the-bad-1.d
@@ -0,0 +1,4 @@
+#name: Illegal test of RCWCAS instructions.
+#source: the-1.s
+#as: -march=armv9.4-a
+#error_output: the-bad-1.l
diff --git a/gas/testsuite/gas/aarch64/the-bad-1.l b/gas/testsuite/gas/aarch64/the-bad-1.l
new file mode 100644
index 0000000000000000000000000000000000000000..319459dcfb8d56ee5a89271c59fe265544c91f05
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/the-bad-1.l
@@ -0,0 +1,81 @@
+[^ :]+: Assembler messages:
+.*: Error: selected processor does not support `rcwcas x0,x1,\[x17\]'
+.*: Error: selected processor does not support `rcwcas x0,x1,\[x27\]'
+.*: Error: selected processor does not support `rcwcas x0,x21,\[x17\]'
+.*: Error: selected processor does not support `rcwcas x0,x21,\[x27\]'
+.*: Error: selected processor does not support `rcwcas x10,x1,\[x17\]'
+.*: Error: selected processor does not support `rcwcas x10,x1,\[x27\]'
+.*: Error: selected processor does not support `rcwcas x10,x21,\[x17\]'
+.*: Error: selected processor does not support `rcwcas x10,x21,\[x27\]'
+.*: Error: selected processor does not support `rcwcas x15,x1,\[x17\]'
+.*: Error: selected processor does not support `rcwcas x15,x1,\[x27\]'
+.*: Error: selected processor does not support `rcwcas x15,x21,\[x17\]'
+.*: Error: selected processor does not support `rcwcas x15,x21,\[x27\]'
+.*: Error: selected processor does not support `rcwcas x20,x1,\[x17\]'
+.*: Error: selected processor does not support `rcwcas x20,x1,\[x27\]'
+.*: Error: selected processor does not support `rcwcas x20,x21,\[x17\]'
+.*: Error: selected processor does not support `rcwcas x20,x21,\[x27\]'
+.*: Error: selected processor does not support `rcwcas x25,x1,\[x17\]'
+.*: Error: selected processor does not support `rcwcas x25,x1,\[x27\]'
+.*: Error: selected processor does not support `rcwcas x25,x21,\[x17\]'
+.*: Error: selected processor does not support `rcwcas x25,x21,\[x27\]'
+.*: Error: selected processor does not support `rcwcasa x0,x1,\[x17\]'
+.*: Error: selected processor does not support `rcwcasa x0,x1,\[x27\]'
+.*: Error: selected processor does not support `rcwcasa x0,x21,\[x17\]'
+.*: Error: selected processor does not support `rcwcasa x0,x21,\[x27\]'
+.*: Error: selected processor does not support `rcwcasa x10,x1,\[x17\]'
+.*: Error: selected processor does not support `rcwcasa x10,x1,\[x27\]'
+.*: Error: selected processor does not support `rcwcasa x10,x21,\[x17\]'
+.*: Error: selected processor does not support `rcwcasa x10,x21,\[x27\]'
+.*: Error: selected processor does not support `rcwcasa x15,x1,\[x17\]'
+.*: Error: selected processor does not support `rcwcasa x15,x1,\[x27\]'
+.*: Error: selected processor does not support `rcwcasa x15,x21,\[x17\]'
+.*: Error: selected processor does not support `rcwcasa x15,x21,\[x27\]'
+.*: Error: selected processor does not support `rcwcasa x20,x1,\[x17\]'
+.*: Error: selected processor does not support `rcwcasa x20,x1,\[x27\]'
+.*: Error: selected processor does not support `rcwcasa x20,x21,\[x17\]'
+.*: Error: selected processor does not support `rcwcasa x20,x21,\[x27\]'
+.*: Error: selected processor does not support `rcwcasa x25,x1,\[x17\]'
+.*: Error: selected processor does not support `rcwcasa x25,x1,\[x27\]'
+.*: Error: selected processor does not support `rcwcasa x25,x21,\[x17\]'
+.*: Error: selected processor does not support `rcwcasa x25,x21,\[x27\]'
+.*: Error: selected processor does not support `rcwcasal x0,x1,\[x17\]'
+.*: Error: selected processor does not support `rcwcasal x0,x1,\[x27\]'
+.*: Error: selected processor does not support `rcwcasal x0,x21,\[x17\]'
+.*: Error: selected processor does not support `rcwcasal x0,x21,\[x27\]'
+.*: Error: selected processor does not support `rcwcasal x10,x1,\[x17\]'
+.*: Error: selected processor does not support `rcwcasal x10,x1,\[x27\]'
+.*: Error: selected processor does not support `rcwcasal x10,x21,\[x17\]'
+.*: Error: selected processor does not support `rcwcasal x10,x21,\[x27\]'
+.*: Error: selected processor does not support `rcwcasal x15,x1,\[x17\]'
+.*: Error: selected processor does not support `rcwcasal x15,x1,\[x27\]'
+.*: Error: selected processor does not support `rcwcasal x15,x21,\[x17\]'
+.*: Error: selected processor does not support `rcwcasal x15,x21,\[x27\]'
+.*: Error: selected processor does not support `rcwcasal x20,x1,\[x17\]'
+.*: Error: selected processor does not support `rcwcasal x20,x1,\[x27\]'
+.*: Error: selected processor does not support `rcwcasal x20,x21,\[x17\]'
+.*: Error: selected processor does not support `rcwcasal x20,x21,\[x27\]'
+.*: Error: selected processor does not support `rcwcasal x25,x1,\[x17\]'
+.*: Error: selected processor does not support `rcwcasal x25,x1,\[x27\]'
+.*: Error: selected processor does not support `rcwcasal x25,x21,\[x17\]'
+.*: Error: selected processor does not support `rcwcasal x25,x21,\[x27\]'
+.*: Error: selected processor does not support `rcwcasl x0,x1,\[x17\]'
+.*: Error: selected processor does not support `rcwcasl x0,x1,\[x27\]'
+.*: Error: selected processor does not support `rcwcasl x0,x21,\[x17\]'
+.*: Error: selected processor does not support `rcwcasl x0,x21,\[x27\]'
+.*: Error: selected processor does not support `rcwcasl x10,x1,\[x17\]'
+.*: Error: selected processor does not support `rcwcasl x10,x1,\[x27\]'
+.*: Error: selected processor does not support `rcwcasl x10,x21,\[x17\]'
+.*: Error: selected processor does not support `rcwcasl x10,x21,\[x27\]'
+.*: Error: selected processor does not support `rcwcasl x15,x1,\[x17\]'
+.*: Error: selected processor does not support `rcwcasl x15,x1,\[x27\]'
+.*: Error: selected processor does not support `rcwcasl x15,x21,\[x17\]'
+.*: Error: selected processor does not support `rcwcasl x15,x21,\[x27\]'
+.*: Error: selected processor does not support `rcwcasl x20,x1,\[x17\]'
+.*: Error: selected processor does not support `rcwcasl x20,x1,\[x27\]'
+.*: Error: selected processor does not support `rcwcasl x20,x21,\[x17\]'
+.*: Error: selected processor does not support `rcwcasl x20,x21,\[x27\]'
+.*: Error: selected processor does not support `rcwcasl x25,x1,\[x17\]'
+.*: Error: selected processor does not support `rcwcasl x25,x1,\[x27\]'
+.*: Error: selected processor does not support `rcwcasl x25,x21,\[x17\]'
+.*: Error: selected processor does not support `rcwcasl x25,x21,\[x27\]'
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 632338318b6ca36088103ed107c62ef51bcdfe29..2e13a70f0455262887ea0947288b130fe01cdb7b 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -948,6 +948,7 @@ enum aarch64_insn_class
bfloat16,
cssc,
gcs,
+ the,
};
/* Opcode enumerators. */
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 74fd6695d818790cf069be62deb9fe51936c409c..62781af9b34dbdb7bcc0a7627692e8e5e44992dc 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -2578,6 +2578,8 @@ static const aarch64_feature_set aarch64_feature_chk =
AARCH64_FEATURE (CHK);
static const aarch64_feature_set aarch64_feature_gcs =
AARCH64_FEATURE (GCS);
+static const aarch64_feature_set aarch64_feature_the =
+ AARCH64_FEATURE (THE);
#define CORE &aarch64_feature_v8
#define FP &aarch64_feature_fp
@@ -2639,6 +2641,7 @@ static const aarch64_feature_set aarch64_feature_gcs =
#define CSSC &aarch64_feature_cssc
#define CHK &aarch64_feature_chk
#define GCS &aarch64_feature_gcs
+#define THE &aarch64_feature_the
#define CORE_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS) \
{ NAME, OPCODE, MASK, CLASS, OP, CORE, OPS, QUALS, FLAGS, 0, 0, NULL }
@@ -2792,6 +2795,8 @@ static const aarch64_feature_set aarch64_feature_gcs =
{ NAME, OPCODE, MASK, ic_system, 0, CHK, OPS, QUALS, FLAGS, 0, 0, NULL }
#define GCS_INSN(NAME, OPCODE, MASK, OPS, QUALS, FLAGS) \
{ NAME, OPCODE, MASK, gcs, 0, GCS, OPS, QUALS, FLAGS, 0, 0, NULL }
+#define THE_INSN(NAME,OPCODE,MASK,OPS,QUALS,FLAGS) \
+ { NAME, OPCODE, MASK, the, 0, THE, OPS, QUALS, FLAGS, 0, 0, NULL }
#define MOPS_CPY_OP1_OP2_PME_INSN(NAME, OPCODE, MASK, FLAGS, CONSTRAINTS) \
MOPS_INSN (NAME, OPCODE, MASK, 0, \
@@ -6106,6 +6111,12 @@ const struct aarch64_opcode aarch64_opcode_table[] =
CSSC_INSN ("smin", 0x1ac06800, 0x7fe0fc00, OP3 (Rd, Rn, Rm), QL_I3SAMER, F_SF),
CSSC_INSN ("umin", 0x1ac06c00, 0x7fe0fc00, OP3 (Rd, Rn, Rm), QL_I3SAMER, F_SF),
+/* Read Check Write Compare and Swap Instructions. */
+ THE_INSN("rcwcas", 0x19200800, 0xffe0fc00, OP3 (Rs, Rt, ADDR_SIMPLE), QL_X2NIL, 0),
+ THE_INSN("rcwcasa", 0x19a00800, 0xffe0fc00, OP3 (Rs, Rt, ADDR_SIMPLE), QL_X2NIL, 0),
+ THE_INSN("rcwcasal", 0x19e00800, 0xffe0fc00, OP3 (Rs, Rt, ADDR_SIMPLE), QL_X2NIL, 0),
+ THE_INSN("rcwcasl", 0x19600800, 0xffe0fc00, OP3 (Rs, Rt, ADDR_SIMPLE), QL_X2NIL, 0),
+
{0, 0, 0, 0, 0, 0, {}, {}, 0, 0, 0, NULL},
};
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