[PATCH] x86: Remove the restriction for size of the mask register in AVX10

[Jiang, Haochen]

> > --- a/opcodes/i386-opc.tbl
> > +++ b/opcodes/i386-opc.tbl
> > @@ -135,9 +135,6 @@
> >
> >  #define Disp8ShiftVL Disp8MemShift=DISP8_SHIFT_VL
> >
> > -#define Vsz256 Vsz=VSZ256
> > -#define Vsz512 Vsz=VSZ512
> 
> Isn't it that with this and ...
> 
> > @@ -996,9 +993,9 @@ pause, 0xf390, i186, NoSuf, {}
> >      b:0:VexW0:Byte:AVX512DQ:66:AVX512VBMI, +
> >      w:1:VexW1:Word:AVX512F::AVX512BW>
> >
> > -<dq:opc:vexw:vexw64:elem:cpu64:gpr:kpfx:kvsz, +
> > -    d:0:VexW0::Dword::Reg32:66:Vsz256, +
> > -    q:1:VexW1:VexW1:Qword:x64:Reg64::Vsz512>
> > +<dq:opc:vexw:vexw64:elem:cpu64:gpr:kpfx, +
> > +    d:0:VexW0::Dword::Reg32:66, +
> > +    q:1:VexW1:VexW1:Qword:x64:Reg64:>
> 
> ... this, the Vsz attribute is no longer used? If so, it wants removing altogether
> at the same time.

If I understand correctly, the attribute still need to be there for xmm/ymm/zmm
restriction right?

Thx,
Haochen

> 
> Jan