[PATCH] gas: aarch64: Add system registers for Debug and PMU extensions
Srinath Parvathaneni
srinath.parvathaneni@arm.com
Wed Dec 13 13:31:29 GMT 2023
Hi,
On 12/11/2023 10:51 AM, Saurabh Jha wrote:
> Hey,
>
> This patch adds support for the new AArch64 system registers that are
> part of the following extensions:
> * FEAT_DEBUGv8p9
> * FEAT_PMUv3p9
> * FEAT_PMUv3_SS
> * FEAT_PMUv3_ICNTR
> * FEAT_SEBEP
>
> Tested using aarch64-none-elf target and found no regression.
>
> Ok for master? I don't have commit access so can someone please commit
> on my behalf?
>
> Regards,
> Saurabh
> diff --git a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.l
> b/gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.l
> index 71ec06e3cb4..02d9cac392c 100644
> --- a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.l
> +++ b/gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.l
> @@ -77,3 +77,50 @@
> .*: Error: selected processor does not support system register name
> 'tcr2_el1'
> .*: Error: selected processor does not support system register name
> 'tcr2_el12'
> .*: Error: selected processor does not support system register name
> 'tcr2_el2'
> +.*: Error: selected processor does not support system register name
> 'mdselr_el1'
> +.*: Error: selected processor does not support system register name
> 'mdselr_el1'
> +.*: Error: selected processor does not support system register name
> 'pmuacr_el1'
> +.*: Error: selected processor does not support system register name
> 'pmuacr_el1'
> +.*: Error: selected processor does not support system register name
> 'pmccntsvr_el1'
> +.*: Error: selected processor does not support system register name
> 'pmicntsvr_el1'
> +.*: Error: selected processor does not support system register name
> 'pmsscr_el1'
> +.*: Error: selected processor does not support system register name
> 'pmsscr_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr0_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr10_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr11_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr12_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr13_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr14_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr15_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr16_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr17_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr18_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr19_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr1_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr20_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr21_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr22_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr23_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr24_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr25_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr26_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr27_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr28_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr29_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr30_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr3_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr4_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr5_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr6_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr7_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr8_el1'
> +.*: Error: selected processor does not support system register name
> 'pmevcntsvr9_el1'
> +.*: Error: selected processor does not support system register name
> 'pmicntr_el0'
> +.*: Error: selected processor does not support system register name
> 'pmicntr_el0'
> +.*: Error: selected processor does not support system register name
> 'pmicfiltr_el0'
> +.*: Error: selected processor does not support system register name
> 'pmicfiltr_el0'
> +.*: Error: selected processor does not support system register name
> 'pmzr_el0'
> +.*: Error: selected processor does not support system register name
> 'pmecr_el1'
> +.*: Error: selected processor does not support system register name
> 'pmecr_el1'
> +.*: Error: selected processor does not support system register name
> 'pmiar_el1'
> +.*: Error: selected processor does not support system register name
> 'pmiar_el1'
> diff --git a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.d
> b/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.d
> index ea4cc867ec3..dc1e8bc1fa8 100644
> --- a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.d
> +++ b/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.d
> @@ -84,3 +84,50 @@ Disassembly of section \.text:
> .*: d5182060 msr tcr2_el1, x0
> .*: d51d2060 msr tcr2_el12, x0
> .*: d51c2060 msr tcr2_el2, x0
> +.*: d5300440 mrs x0, mdselr_el1
> +.*: d5100440 msr mdselr_el1, x0
> +.*: d5389e80 mrs x0, pmuacr_el1
> +.*: d5189e80 msr pmuacr_el1, x0
> +.*: d530ebe0 mrs x0, pmccntsvr_el1
> +.*: d530ec00 mrs x0, pmicntsvr_el1
> +.*: d5389d60 mrs x0, pmsscr_el1
> +.*: d5189d60 msr pmsscr_el1, x0
> +.*: d530e800 mrs x0, pmevcntsvr0_el1
> +.*: d530e940 mrs x0, pmevcntsvr10_el1
> +.*: d530e960 mrs x0, pmevcntsvr11_el1
> +.*: d530e980 mrs x0, pmevcntsvr12_el1
> +.*: d530e9a0 mrs x0, pmevcntsvr13_el1
> +.*: d530e9c0 mrs x0, pmevcntsvr14_el1
> +.*: d530e9e0 mrs x0, pmevcntsvr15_el1
> +.*: d530ea00 mrs x0, pmevcntsvr16_el1
> +.*: d530ea20 mrs x0, pmevcntsvr17_el1
> +.*: d530ea40 mrs x0, pmevcntsvr18_el1
> +.*: d530ea60 mrs x0, pmevcntsvr19_el1
> +.*: d530e820 mrs x0, pmevcntsvr1_el1
> +.*: d530ea80 mrs x0, pmevcntsvr20_el1
> +.*: d530eaa0 mrs x0, pmevcntsvr21_el1
> +.*: d530eac0 mrs x0, pmevcntsvr22_el1
> +.*: d530eae0 mrs x0, pmevcntsvr23_el1
> +.*: d530eb00 mrs x0, pmevcntsvr24_el1
> +.*: d530eb20 mrs x0, pmevcntsvr25_el1
> +.*: d530eb40 mrs x0, pmevcntsvr26_el1
> +.*: d530eb60 mrs x0, pmevcntsvr27_el1
> +.*: d530eb80 mrs x0, pmevcntsvr28_el1
> +.*: d530eba0 mrs x0, pmevcntsvr29_el1
> +.*: d530ebc0 mrs x0, pmevcntsvr30_el1
> +.*: d530e860 mrs x0, pmevcntsvr3_el1
> +.*: d530e880 mrs x0, pmevcntsvr4_el1
> +.*: d530e8a0 mrs x0, pmevcntsvr5_el1
> +.*: d530e8c0 mrs x0, pmevcntsvr6_el1
> +.*: d530e8e0 mrs x0, pmevcntsvr7_el1
> +.*: d530e900 mrs x0, pmevcntsvr8_el1
> +.*: d530e920 mrs x0, pmevcntsvr9_el1
> +.*: d53b9400 mrs x0, pmicntr_el0
> +.*: d51b9400 msr pmicntr_el0, x0
> +.*: d53b9600 mrs x0, pmicfiltr_el0
> +.*: d51b9600 msr pmicfiltr_el0, x0
> +.*: d51b9d80 msr pmzr_el0, x0
> +.*: d5389ea0 mrs x0, pmecr_el1
> +.*: d5189ea0 msr pmecr_el1, x0
> +.*: d5389ee0 mrs x0, pmiar_el1
> +.*: d5189ee0 msr pmiar_el1, x0
> \ No newline at end of file
> diff --git a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.s
> b/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.s
> index 2768c268690..536631823f5 100644
> --- a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.s
> +++ b/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.s
> @@ -98,3 +98,60 @@
> msr tcr2_el1, x0
> msr tcr2_el12, x0
> msr tcr2_el2, x0
> +
> + /* FEAT_DEBUGv8p9 Extension. */
> + mrs x0, mdselr_el1
> + msr mdselr_el1, x0
> +
> + /* FEAT_PMUv3p9 Extension. */
> + mrs x0, pmuacr_el1
> + msr pmuacr_el1, x0
> +
> + /* FEAT_PMUv3_SS Extension. */
> + mrs x0, pmccntsvr_el1
> + mrs x0, pmicntsvr_el1
> + mrs x0, pmsscr_el1
> + msr pmsscr_el1, x0
> + mrs x0, pmevcntsvr0_el1
> + mrs x0, pmevcntsvr10_el1
> + mrs x0, pmevcntsvr11_el1
> + mrs x0, pmevcntsvr12_el1
> + mrs x0, pmevcntsvr13_el1
> + mrs x0, pmevcntsvr14_el1
> + mrs x0, pmevcntsvr15_el1
> + mrs x0, pmevcntsvr16_el1
> + mrs x0, pmevcntsvr17_el1
> + mrs x0, pmevcntsvr18_el1
> + mrs x0, pmevcntsvr19_el1
> + mrs x0, pmevcntsvr1_el1
> + mrs x0, pmevcntsvr20_el1
> + mrs x0, pmevcntsvr21_el1
> + mrs x0, pmevcntsvr22_el1
> + mrs x0, pmevcntsvr23_el1
> + mrs x0, pmevcntsvr24_el1
> + mrs x0, pmevcntsvr25_el1
> + mrs x0, pmevcntsvr26_el1
> + mrs x0, pmevcntsvr27_el1
> + mrs x0, pmevcntsvr28_el1
> + mrs x0, pmevcntsvr29_el1
> + mrs x0, pmevcntsvr30_el1
> + mrs x0, pmevcntsvr3_el1
> + mrs x0, pmevcntsvr4_el1
> + mrs x0, pmevcntsvr5_el1
> + mrs x0, pmevcntsvr6_el1
> + mrs x0, pmevcntsvr7_el1
> + mrs x0, pmevcntsvr8_el1
> + mrs x0, pmevcntsvr9_el1
> +
> + /* FEAT_PMUv3_ICNTR Extension. */
> + mrs x0, pmicntr_el0
> + msr pmicntr_el0, x0
> + mrs x0, pmicfiltr_el0
> + msr pmicfiltr_el0, x0
> + msr pmzr_el0, x0
> +
> + /* FEAT_SEBEP Extension. */
> + mrs x0, pmecr_el1
> + msr pmecr_el1, x0
> + mrs x0, pmiar_el1
> + msr pmiar_el1, x0
> diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
> index 632338318b6..2d7bca37c59 100644
> --- a/include/opcode/aarch64.h
> +++ b/include/opcode/aarch64.h
> @@ -197,6 +197,16 @@ enum aarch64_feature_bit {
> AARCH64_FEATURE_S2POE,
> /* Extension to Translation Control Registers. */
> AARCH64_FEATURE_TCR2,
> + /* Armv8.9-A/Armv9.4-A architecture Debug extension. */
> + AARCH64_FEATURE_DEBUGv8p9,
> + /* Performance Monitors Extension. */
> + AARCH64_FEATURE_PMUv3p9,
> + /* Performance Monitors Snapshots Extension. */
> + AARCH64_FEATURE_PMUv3_SS,
> + /* Performance Monitors Instruction Counter Extension. */
> + AARCH64_FEATURE_PMUv3_ICNTR,
> + /* Performance Monitors Synchronous-Exception-Based Event
> Extension. */
> + AARCH64_FEATURE_SEBEP,
> AARCH64_NUM_FEATURES
> };
>
> @@ -266,7 +276,12 @@ enum aarch64_feature_bit {
> | AARCH64_FEATBIT (X, S2PIE) \
> | AARCH64_FEATBIT (X, S1POE) \
> | AARCH64_FEATBIT (X, S2POE) \
> - | AARCH64_FEATBIT (X, TCR2) \
> + | AARCH64_FEATBIT (X, TCR2) \
I'm not a maintainer, just reviewing the code and found
changes is above line are not needed, seems like some
formatting error, please revert, other than this the patch
looks okay to me.
> + | AARCH64_FEATBIT (X, DEBUGv8p9) \
> + | AARCH64_FEATBIT (X, PMUv3p9) \
> + | AARCH64_FEATBIT (X, PMUv3_SS) \
> + | AARCH64_FEATBIT (X, PMUv3_ICNTR) \
> + | AARCH64_FEATBIT (X, SEBEP) \
> )
>
> #define AARCH64_ARCH_V9A_FEATURES(X) (AARCH64_FEATBIT (X, V9A) \
> diff --git a/opcodes/aarch64-sys-regs.def b/opcodes/aarch64-sys-regs.def
> index 0f647efca7e..8413fee0889 100644
> --- a/opcodes/aarch64-sys-regs.def
> +++ b/opcodes/aarch64-sys-regs.def
> @@ -570,6 +570,7 @@
> SYSREG ("mdcr_el3", CPENC (3,6,1,3,1), 0,
> AARCH64_NO_FEATURES)
> SYSREG ("mdrar_el1", CPENC (2,0,1,0,0), F_REG_READ,
> AARCH64_NO_FEATURES)
> SYSREG ("mdscr_el1", CPENC (2,0,0,2,2), 0,
> AARCH64_NO_FEATURES)
> + SYSREG ("mdselr_el1", CPENC (2,0,0,4,2), F_ARCHEXT,
> AARCH64_FEATURE (DEBUGv8p9))
> SYSREG ("mecid_a0_el2", CPENC (3,4,10,8,1), 0,
> AARCH64_NO_FEATURES)
> SYSREG ("mecid_a1_el2", CPENC (3,4,10,8,3), 0,
> AARCH64_NO_FEATURES)
> SYSREG ("mecid_p0_el2", CPENC (3,4,10,8,0), 0,
> AARCH64_NO_FEATURES)
> @@ -626,11 +627,13 @@
> SYSREG ("pmbsr_el1", CPENC (3,0,9,10,3), F_ARCHEXT,
> AARCH64_FEATURE (PROFILE))
> SYSREG ("pmccfiltr_el0", CPENC (3,3,14,15,7), 0,
> AARCH64_NO_FEATURES)
> SYSREG ("pmccntr_el0", CPENC (3,3,9,13,0), 0,
> AARCH64_NO_FEATURES)
> + SYSREG ("pmccntsvr_el1", CPENC (2,0,14,11,7),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> SYSREG ("pmceid0_el0", CPENC (3,3,9,12,6), F_REG_READ,
> AARCH64_NO_FEATURES)
> SYSREG ("pmceid1_el0", CPENC (3,3,9,12,7), F_REG_READ,
> AARCH64_NO_FEATURES)
> SYSREG ("pmcntenclr_el0", CPENC (3,3,9,12,2), 0,
> AARCH64_NO_FEATURES)
> SYSREG ("pmcntenset_el0", CPENC (3,3,9,12,1), 0,
> AARCH64_NO_FEATURES)
> SYSREG ("pmcr_el0", CPENC (3,3,9,12,0), 0,
> AARCH64_NO_FEATURES)
> + SYSREG ("pmecr_el1", CPENC (3,0,9,14,5), F_ARCHEXT,
> AARCH64_FEATURE (SEBEP))
> SYSREG ("pmevcntr0_el0", CPENC (3,3,14,8,0), 0,
> AARCH64_NO_FEATURES)
> SYSREG ("pmevcntr10_el0", CPENC (3,3,14,9,2), 0,
> AARCH64_NO_FEATURES)
> SYSREG ("pmevcntr11_el0", CPENC (3,3,14,9,3), 0,
> AARCH64_NO_FEATURES)
> @@ -662,6 +665,37 @@
> SYSREG ("pmevcntr7_el0", CPENC (3,3,14,8,7), 0,
> AARCH64_NO_FEATURES)
> SYSREG ("pmevcntr8_el0", CPENC (3,3,14,9,0), 0,
> AARCH64_NO_FEATURES)
> SYSREG ("pmevcntr9_el0", CPENC (3,3,14,9,1), 0,
> AARCH64_NO_FEATURES)
> + SYSREG ("pmevcntsvr0_el1", CPENC (2,0,14,8,0),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr10_el1", CPENC (2,0,14,9,2),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr11_el1", CPENC (2,0,14,9,3),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr12_el1", CPENC (2,0,14,9,4),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr13_el1", CPENC (2,0,14,9,5),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr14_el1", CPENC (2,0,14,9,6),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr15_el1", CPENC (2,0,14,9,7),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr16_el1", CPENC (2,0,14,10,0),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr17_el1", CPENC (2,0,14,10,1),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr18_el1", CPENC (2,0,14,10,2),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr19_el1", CPENC (2,0,14,10,3),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr1_el1", CPENC (2,0,14,8,1),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr20_el1", CPENC (2,0,14,10,4),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr21_el1", CPENC (2,0,14,10,5),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr22_el1", CPENC (2,0,14,10,6),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr23_el1", CPENC (2,0,14,10,7),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr24_el1", CPENC (2,0,14,11,0),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr25_el1", CPENC (2,0,14,11,1),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr26_el1", CPENC (2,0,14,11,2),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr27_el1", CPENC (2,0,14,11,3),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr28_el1", CPENC (2,0,14,11,4),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr29_el1", CPENC (2,0,14,11,5),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr2_el1", CPENC (2,0,14,8,2),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr30_el1", CPENC (2,0,14,11,6),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr3_el1", CPENC (2,0,14,8,3),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr4_el1", CPENC (2,0,14,8,4),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr5_el1", CPENC (2,0,14,8,5),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr6_el1", CPENC (2,0,14,8,6),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr7_el1", CPENC (2,0,14,8,7),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr8_el1", CPENC (2,0,14,9,0),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> + SYSREG ("pmevcntsvr9_el1", CPENC (2,0,14,9,1),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> SYSREG ("pmevtyper0_el0", CPENC (3,3,14,12,0), 0,
> AARCH64_NO_FEATURES)
> SYSREG ("pmevtyper10_el0", CPENC (3,3,14,13,2), 0,
> AARCH64_NO_FEATURES)
> SYSREG ("pmevtyper11_el0", CPENC (3,3,14,13,3), 0,
> AARCH64_NO_FEATURES)
> @@ -693,6 +727,10 @@
> SYSREG ("pmevtyper7_el0", CPENC (3,3,14,12,7), 0,
> AARCH64_NO_FEATURES)
> SYSREG ("pmevtyper8_el0", CPENC (3,3,14,13,0), 0,
> AARCH64_NO_FEATURES)
> SYSREG ("pmevtyper9_el0", CPENC (3,3,14,13,1), 0,
> AARCH64_NO_FEATURES)
> + SYSREG ("pmiar_el1", CPENC (3,0,9,14,7), F_ARCHEXT,
> AARCH64_FEATURE (SEBEP))
> + SYSREG ("pmicfiltr_el0", CPENC (3,3,9,6,0), F_ARCHEXT,
> AARCH64_FEATURE (PMUv3_ICNTR))
> + SYSREG ("pmicntr_el0", CPENC (3,3,9,4,0), F_ARCHEXT,
> AARCH64_FEATURE (PMUv3_ICNTR))
> + SYSREG ("pmicntsvr_el1", CPENC (2,0,14,12,0),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS))
> SYSREG ("pmintenclr_el1", CPENC (3,0,9,14,2), 0,
> AARCH64_NO_FEATURES)
> SYSREG ("pmintenset_el1", CPENC (3,0,9,14,1), 0,
> AARCH64_NO_FEATURES)
> SYSREG ("pmmir_el1", CPENC (3,0,9,14,6),
> F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (V8_4A))
> @@ -710,10 +748,13 @@
> SYSREG ("pmsirr_el1", CPENC (3,0,9,9,3), F_ARCHEXT,
> AARCH64_FEATURE (PROFILE))
> SYSREG ("pmslatfr_el1", CPENC (3,0,9,9,6), F_ARCHEXT,
> AARCH64_FEATURE (PROFILE))
> SYSREG ("pmsnevfr_el1", CPENC (3,0,9,9,1), F_ARCHEXT,
> AARCH64_FEATURE (V8_7A))
> + SYSREG ("pmsscr_el1", CPENC (3,0,9,13,3), F_ARCHEXT,
> AARCH64_FEATURE (PMUv3_SS))
> SYSREG ("pmswinc_el0", CPENC (3,3,9,12,4), F_REG_WRITE,
> AARCH64_NO_FEATURES)
> + SYSREG ("pmuacr_el1", CPENC (3,0,9,14,4), F_ARCHEXT,
> AARCH64_FEATURE (PMUv3p9))
> SYSREG ("pmuserenr_el0", CPENC (3,3,9,14,0), 0,
> AARCH64_NO_FEATURES)
> SYSREG ("pmxevcntr_el0", CPENC (3,3,9,13,2), 0,
> AARCH64_NO_FEATURES)
> SYSREG ("pmxevtyper_el0", CPENC (3,3,9,13,1), 0,
> AARCH64_NO_FEATURES)
> + SYSREG ("pmzr_el0", CPENC (3,3,9,13,4),
> F_REG_WRITE|F_ARCHEXT, AARCH64_FEATURE (PMUv3_ICNTR))
> SYSREG ("por_el0", CPENC (3,3,10,2,4), F_ARCHEXT,
> AARCH64_FEATURE (S1POE))
> SYSREG ("por_el1", CPENC (3,0,10,2,4), F_ARCHEXT,
> AARCH64_FEATURE (S1POE))
> SYSREG ("por_el12", CPENC (3,5,10,2,4), F_ARCHEXT,
> AARCH64_FEATURE (S1POE))
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