[PATCH] x86: allow 32-bit reg to be used with U{RD,WR}MSR

[Jan Beulich]

On 12.12.2023 08:13, Hu, Lin1 wrote:
>> -----Original Message-----
>> From: Jan Beulich <jbeulich@suse.com>
>> Sent: Monday, December 4, 2023 3:18 PM
>>
>> On 04.12.2023 02:45, Hu, Lin1 wrote:
>>> I talked to the people involved. They found the eds description about
>>> "ignoring h32 bits of the MSR address for register variants" is a documentation
>> bug. The right version is USER_MSR have a GP fault on h32 of the MSR address
>> for the register version. So they update the description from #GP(0) If
>> MSR_address[63:0] & 0x0000_0000_FFFF_C000 != 0 to #GP(0) If
>> MSR_address[63:0] & 0xFFFF_FFFF_FFFF_C000 != 0. And the source register will
>> still be r64 in the spec.
>>
>> What an unhelpful behavior. I'll need to revert the patch below then, assuming
>> they're not willing to re-think.
>>
> 
> I think they don't what to change it. Because, if they change the spec, it would involve a lot of places, and  r64 make sense at the moment.

So this last part is what I don't understand: MSR space is 32 bits. Why does
"r64 make sense at the moment"?

Jan