[PATCH 0/1] RISC-V: Add support for 'Zacas' atomic CAS

[Gianluca Guida]

Hi Tsukasa,

I somehow missed this thread completely, as I wasn't in CC. Catching up now.

On Sat, Oct 21, 2023 at 4:12 AM Tsukasa OI <research_trasio@irq.a4lg.com> wrote:
>
> Differences to Gianluka's:
> 1.  Correct data size (INSN_DREF|INSN_*_BYTE) we are handling
Correct, that was in fact fixed in my patch on my current tree.
Surprised didn't catch that earlier.

> 2.  Make register pair matching function to be template
>     to enable reusing this framework for upcoming P and existing Zdinx and
>     V (many V cases are invalid only on certain runtime configuration and
>     "always invalid" detectable cases are rare, but not zero).

Sure, I wondered about other generalising support for pair of
registers, but I was expecting some kind of discussion on the review,
so I went for the simplest patch possible, when I implemented that in
the v2.

I don't have any strong opinion on which patch to use.

Gianluca.