Ping: [PATCH] Arm64: support CLEARBHB alias
Jan Beulich
jbeulich@suse.com
Wed Sep 28 12:00:01 GMT 2022
On 12.09.2022 10:40, Jan Beulich via Binutils wrote:
> While the Arm v8 ARM (rev I-a) still doesn't mention this alias, it is
> (typically via a macro) already in use in kernels and alike.
May I ask for feedback here? Without hearing back, I guess I'll simply
put this in some time next week.
Jan
> ---
> Diffs of generated files omitted.
>
> --- a/gas/testsuite/gas/aarch64/system.d
> +++ b/gas/testsuite/gas/aarch64/system.d
> @@ -12,6 +12,7 @@ Disassembly of section \.text:
> .*: d503207f wfi
> .*: d503209f sev
> .*: d50320bf sevl
> +.*: d50322df clearbhb
> .*: d503201f nop
> .*: d503203f yield
> .*: d503205f wfe
> @@ -34,7 +35,7 @@ Disassembly of section \.text:
> .*: d503227f hint #0x13
> .*: d503229f (hint #0x14|csdb)
> .*: d50322bf hint #0x15
> -.*: d50322df hint #0x16
> +.*: d50322df (hint #0x16|clearbhb)
> .*: d50322ff hint #0x17
> .*: d503231f (hint #0x18|paciaz)
> .*: d503233f (hint #0x19|paciasp)
> --- a/gas/testsuite/gas/aarch64/system.s
> +++ b/gas/testsuite/gas/aarch64/system.s
> @@ -11,6 +11,7 @@
> wfi
> sev
> sevl
> + clearbhb
>
> .macro all_hints from=0, to=127
> hint \from
> --- a/opcodes/aarch64-tbl.h
> +++ b/opcodes/aarch64-tbl.h
> @@ -4034,6 +4034,7 @@ const struct aarch64_opcode aarch64_opco
> CORE_INSN ("esb", 0xd503221f, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS),
> CORE_INSN ("psb", 0xd503223f, 0xffffffff, ic_system, 0, OP1 (BARRIER_PSB), {}, F_ALIAS),
> CORE_INSN ("tsb", 0xd503225f, 0xffffffff, ic_system, 0, OP1 (BARRIER_PSB), {}, F_ALIAS),
> + CORE_INSN ("clearbhb", 0xd50322df, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS),
> CORE_INSN ("clrex", 0xd503305f, 0xfffff0ff, ic_system, 0, OP1 (UIMM4), {}, F_OPD0_OPT | F_DEFAULT (0xF)),
> CORE_INSN ("dsb", 0xd503309f, 0xfffff0ff, ic_system, 0, OP1 (BARRIER), {}, F_HAS_ALIAS),
> V8_7_INSN ("dsb", 0xd503323f, 0xfffff3ff, ic_system, OP1 (BARRIER_DSB_NXS), {}, F_HAS_ALIAS),
More information about the Binutils
mailing list