[PATCH 01/10] Support Intel AVX-IFMA

[H.J. Lu]

On Fri, Oct 14, 2022 at 2:52 AM Jan Beulich <jbeulich@suse.com> wrote:
>
> On 14.10.2022 11:12, Haochen Jiang wrote:
> > From: wwwhhhyyy <hongyu.wang@intel.com>
> >
> > x86: Support Intel AVX-IFMA
> >
> > Intel AVX IFMA instructions are marked with CpuVEX_PREFIX, which is
> > cleared by default.  Without {vex} pseudo prefix, Intel IFMA instructions
> > are encoded with EVEX prefix.  {vex} pseudo prefix will turn on VEX
> > encoding for Intel IFMA instructions.
>
> I firmly object to the proliferation of this mis-feature. As expressed
> before for AVX-VNNI, as long as the user has disabled AVX512 (or
> respective sub-features thereof), there should be no need to use {vex} in
> the source code. There's also no reason at all to make the disassembler
> print {vex} prefixes - we don't do so for any other insns (apart from
> AVX-VNNI) where an ambiguity exists between their VEX and EVEX encodings
> (when none of the EVEX-specific features is used).

The {vex} prefix is used with AVX-IFMA instructions so that IFMA instructions
without a prefix, which are generated by compilers or handwritten, will be
always encoded with EVEX.

> I actually have a patch queued to undo the odd behavior for AVX-VNNI, at
> least on the assembler side (which also drops the PseudoVexPrefix
> attribute).
>


-- 
H.J.