[PATCH v2 1/2] RISC-V: Fallback for instructions longer than 64b

[Tsukasa OI]

On 2022/10/06 17:22, Jan Beulich wrote:
> On 06.10.2022 06:40, Tsukasa OI via Binutils wrote:
>> We don't support instructions longer than 64-bits yet.  Still, we can
>> modify validate_riscv_insn function to prevent unexpected behavior by
>> limiting the "length" of an instruction to 64-bit (or less).
>>
>> gas/ChangeLog:
>>
>> 	* config/tc-riscv.c (validate_riscv_insn): Fix function
>> 	description comment based on current usage.  Limit instruction
>> 	length up to 64-bit for now.  Make sure that required_bits does
>> 	not corrupt even if unsigned long long is longer than 64-bit.
> 
> While I agree with the code change, I don't agree with the adjustment
> to the comment - you're changing it to match the sole present caller,
> but imo such a comment ought to describe the behavior of the function
> irrespective of how it's used at any given point in time.
> 
> Jan
> 

Okay, I revised the comment to reflect the specification itself.

Thanks,
Tsukasa