[PATCH] RISC-V: Allow merging 'H' extension

[Nelson Chu]

On Sat, Nov 26, 2022 at 11:14 AM Tsukasa OI
<research_trasio@irq.a4lg.com> wrote:
>
> From: Tsukasa OI <research_trasio@irq.a4lg.com>
>
> Because riscv_merge_std_ext function did not merge the 'H' extension, linked
> executables lacked 'H' extension when multiple objects are linked.
>
> This issue is found while building OpenSBI with 'H' extension (resulting
> ELF files did not contain "h1p0" in "Tag_RISCV_arch" even if *all* linked
> object files contained it).
>
> This commit adds 'h' to standard_exts variable to merge 'H' extension.
>
> bfd/ChangeLog:
>
>         * elfnn-riscv.c (riscv_merge_std_ext): Add 'H' extension merging.
>
> ld/ChangeLog:
>
>         * testsuite/ld-riscv-elf/attr-merge-arch-02.d: Test merging of 'H'
>         and 'Zicsr' extensions.
>         * testsuite/ld-riscv-elf/attr-merge-arch-02a.s: Likewise.

Thanks, we missed this, so it looks good except that I think we don't
need to add/update test cases to test this trivial fix.

Nelson

> ---
>  bfd/elfnn-riscv.c                               | 2 +-
>  ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d  | 2 +-
>  ld/testsuite/ld-riscv-elf/attr-merge-arch-02a.s | 2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
> index a2d85dbe9396..a83c8ad2695e 100644
> --- a/bfd/elfnn-riscv.c
> +++ b/bfd/elfnn-riscv.c
> @@ -3427,7 +3427,7 @@ riscv_merge_std_ext (bfd *ibfd,
>                      struct riscv_subset_t **pin,
>                      struct riscv_subset_t **pout)
>  {
> -  const char *standard_exts = "mafdqlcbjtpvn";
> +  const char *standard_exts = "mafdqlcbjtpvnh";
>    const char *p;
>    struct riscv_subset_t *in = *pin;
>    struct riscv_subset_t *out = *pout;
> diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d b/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d
> index 381ef850d974..d1ed8667303c 100644
> --- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d
> +++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d
> @@ -6,4 +6,4 @@
>
>  Attribute Section: riscv
>  File Attributes
> -  Tag_RISCV_arch: "rv32i2p1_a2p0"
> +  Tag_RISCV_arch: "rv32i2p1_a2p0_h1p0_zicsr2p0"
> diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-02a.s b/ld/testsuite/ld-riscv-elf/attr-merge-arch-02a.s
> index 4593241c0249..696e83975346 100644
> --- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-02a.s
> +++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-02a.s
> @@ -1 +1 @@
> -       .attribute arch, "rv32i2p1_a2p0"
> +       .attribute arch, "rv32i2p1_a2p0_h1p0_zicsr2p0"
>
> base-commit: 66e7b0f4d9c88781c2b7589f86e31a7d153ed60c
> --
> 2.38.1
>