[RFC PATCH 3/3] RISC-V: Add disassembler tests for shift amount

Tsukasa OI research_trasio@irq.a4lg.com
Mon May 23 10:06:25 GMT 2022


This commit adds tests for shift instruction to make sure that the
disassembler detects invalid shift amount.

gas/ChangeLog:

	* testsuite/gas/riscv/shamt-dis.s: New disassembler test.
	* testsuite/gas/riscv/shamt-dis-32.d: Likewise.
	* testsuite/gas/riscv/shamt-dis-64.d: Likewise.
---
 gas/testsuite/gas/riscv/shamt-dis-32.d | 34 +++++++++++++++++++
 gas/testsuite/gas/riscv/shamt-dis-64.d | 34 +++++++++++++++++++
 gas/testsuite/gas/riscv/shamt-dis.s    | 45 ++++++++++++++++++++++++++
 3 files changed, 113 insertions(+)
 create mode 100644 gas/testsuite/gas/riscv/shamt-dis-32.d
 create mode 100644 gas/testsuite/gas/riscv/shamt-dis-64.d
 create mode 100644 gas/testsuite/gas/riscv/shamt-dis.s

diff --git a/gas/testsuite/gas/riscv/shamt-dis-32.d b/gas/testsuite/gas/riscv/shamt-dis-32.d
new file mode 100644
index 00000000000..b160353f297
--- /dev/null
+++ b/gas/testsuite/gas/riscv/shamt-dis-32.d
@@ -0,0 +1,34 @@
+#as: -march=rv32ic_zba_zbb_zbs
+#source: shamt-dis.s
+#objdump: -d -M no-aliases
+
+.*:[ 	]+file format .*
+
+
+Disassembly of section .text:
+
+0+000 <target>:
+[ 	]+[0-9a-f]+:[ 	]+01f59513[ 	]+slli[ 	]+a0,a1,0x1f
+[ 	]+[0-9a-f]+:[ 	]+02059513[ 	]+\.4byte[ 	]+0x2059513
+[ 	]+[0-9a-f]+:[ 	]+01f5d513[ 	]+srli[ 	]+a0,a1,0x1f
+[ 	]+[0-9a-f]+:[ 	]+0205d513[ 	]+\.4byte[ 	]+0x205d513
+[ 	]+[0-9a-f]+:[ 	]+41f5d513[ 	]+srai[ 	]+a0,a1,0x1f
+[ 	]+[0-9a-f]+:[ 	]+4205d513[ 	]+\.4byte[ 	]+0x4205d513
+[ 	]+[0-9a-f]+:[ 	]+057e[ 	]+c\.slli[ 	]+a0,0x1f
+[ 	]+[0-9a-f]+:[ 	]+1502[ 	]+\.2byte[ 	]+0x1502
+[ 	]+[0-9a-f]+:[ 	]+817d[ 	]+c\.srli[ 	]+a0,0x1f
+[ 	]+[0-9a-f]+:[ 	]+9101[ 	]+\.2byte[ 	]+0x9101
+[ 	]+[0-9a-f]+:[ 	]+857d[ 	]+c\.srai[ 	]+a0,0x1f
+[ 	]+[0-9a-f]+:[ 	]+9501[ 	]+\.2byte[ 	]+0x9501
+[ 	]+[0-9a-f]+:[ 	]+61f5d513[ 	]+rori[ 	]+a0,a1,0x1f
+[ 	]+[0-9a-f]+:[ 	]+6205d513[ 	]+\.4byte[ 	]+0x6205d513
+[ 	]+[0-9a-f]+:[ 	]+09f5951b[ 	]+\.4byte[ 	]+0x9f5951b
+[ 	]+[0-9a-f]+:[ 	]+0a05951b[ 	]+\.4byte[ 	]+0xa05951b
+[ 	]+[0-9a-f]+:[ 	]+49f59513[ 	]+bclri[ 	]+a0,a1,0x1f
+[ 	]+[0-9a-f]+:[ 	]+4a059513[ 	]+\.4byte[ 	]+0x4a059513
+[ 	]+[0-9a-f]+:[ 	]+29f59513[ 	]+bseti[ 	]+a0,a1,0x1f
+[ 	]+[0-9a-f]+:[ 	]+2a059513[ 	]+\.4byte[ 	]+0x2a059513
+[ 	]+[0-9a-f]+:[ 	]+69f59513[ 	]+binvi[ 	]+a0,a1,0x1f
+[ 	]+[0-9a-f]+:[ 	]+6a059513[ 	]+\.4byte[ 	]+0x6a059513
+[ 	]+[0-9a-f]+:[ 	]+49f5d513[ 	]+bexti[ 	]+a0,a1,0x1f
+[ 	]+[0-9a-f]+:[ 	]+4a05d513[ 	]+\.4byte[ 	]+0x4a05d513
diff --git a/gas/testsuite/gas/riscv/shamt-dis-64.d b/gas/testsuite/gas/riscv/shamt-dis-64.d
new file mode 100644
index 00000000000..d10e90d9d30
--- /dev/null
+++ b/gas/testsuite/gas/riscv/shamt-dis-64.d
@@ -0,0 +1,34 @@
+#as: -march=rv64ic_zba_zbb_zbs
+#source: shamt-dis.s
+#objdump: -d -M no-aliases
+
+.*:[ 	]+file format .*
+
+
+Disassembly of section .text:
+
+0+000 <target>:
+[ 	]+[0-9a-f]+:[ 	]+01f59513[ 	]+slli[ 	]+a0,a1,0x1f
+[ 	]+[0-9a-f]+:[ 	]+02059513[ 	]+slli[ 	]+a0,a1,0x20
+[ 	]+[0-9a-f]+:[ 	]+01f5d513[ 	]+srli[ 	]+a0,a1,0x1f
+[ 	]+[0-9a-f]+:[ 	]+0205d513[ 	]+srli[ 	]+a0,a1,0x20
+[ 	]+[0-9a-f]+:[ 	]+41f5d513[ 	]+srai[ 	]+a0,a1,0x1f
+[ 	]+[0-9a-f]+:[ 	]+4205d513[ 	]+srai[ 	]+a0,a1,0x20
+[ 	]+[0-9a-f]+:[ 	]+057e[ 	]+c\.slli[ 	]+a0,0x1f
+[ 	]+[0-9a-f]+:[ 	]+1502[ 	]+c\.slli[ 	]+a0,0x20
+[ 	]+[0-9a-f]+:[ 	]+817d[ 	]+c\.srli[ 	]+a0,0x1f
+[ 	]+[0-9a-f]+:[ 	]+9101[ 	]+c\.srli[ 	]+a0,0x20
+[ 	]+[0-9a-f]+:[ 	]+857d[ 	]+c\.srai[ 	]+a0,0x1f
+[ 	]+[0-9a-f]+:[ 	]+9501[ 	]+c\.srai[ 	]+a0,0x20
+[ 	]+[0-9a-f]+:[ 	]+61f5d513[ 	]+rori[ 	]+a0,a1,0x1f
+[ 	]+[0-9a-f]+:[ 	]+6205d513[ 	]+rori[ 	]+a0,a1,0x20
+[ 	]+[0-9a-f]+:[ 	]+09f5951b[ 	]+slli\.uw[ 	]+a0,a1,0x1f
+[ 	]+[0-9a-f]+:[ 	]+0a05951b[ 	]+slli\.uw[ 	]+a0,a1,0x20
+[ 	]+[0-9a-f]+:[ 	]+49f59513[ 	]+bclri[ 	]+a0,a1,0x1f
+[ 	]+[0-9a-f]+:[ 	]+4a059513[ 	]+bclri[ 	]+a0,a1,0x20
+[ 	]+[0-9a-f]+:[ 	]+29f59513[ 	]+bseti[ 	]+a0,a1,0x1f
+[ 	]+[0-9a-f]+:[ 	]+2a059513[ 	]+bseti[ 	]+a0,a1,0x20
+[ 	]+[0-9a-f]+:[ 	]+69f59513[ 	]+binvi[ 	]+a0,a1,0x1f
+[ 	]+[0-9a-f]+:[ 	]+6a059513[ 	]+binvi[ 	]+a0,a1,0x20
+[ 	]+[0-9a-f]+:[ 	]+49f5d513[ 	]+bexti[ 	]+a0,a1,0x1f
+[ 	]+[0-9a-f]+:[ 	]+4a05d513[ 	]+bexti[ 	]+a0,a1,0x20
diff --git a/gas/testsuite/gas/riscv/shamt-dis.s b/gas/testsuite/gas/riscv/shamt-dis.s
new file mode 100644
index 00000000000..edade302562
--- /dev/null
+++ b/gas/testsuite/gas/riscv/shamt-dis.s
@@ -0,0 +1,45 @@
+target:
+	# slli a0,a1,SHAMT [31/32]
+	.insn 0x01f59513
+	.insn 0x02059513
+	# srli a0,a1,SHAMT [31/32]
+	.insn 0x01f5d513
+	.insn 0x0205d513
+	# srai a0,a1,SHAMT [31/32]
+	.insn 0x41f5d513
+	.insn 0x4205d513
+
+	# RVC
+	# c.slli a0,SHAMT [31/32]
+	.insn 0x057e
+	.insn 0x1502
+	# c.srli a0,SHAMT [31/32]
+	.insn 0x817d
+	.insn 0x9101
+	# c.srai a0,SHAMT [31/32]
+	.insn 0x857d
+	.insn 0x9501
+
+	# Zbb extension (or Zbkb)
+	# rori a0,a1,SHAMT [31/32]
+	.insn 0x61f5d513
+	.insn 0x6205d513
+
+	# Zba extension
+	# slli.uw a0,a1,SHAMT [31/32] (invalid on RV32)
+	.insn 0x09f5951b
+	.insn 0x0a05951b
+
+	# Zbs extension
+	# bclri a0,a1,SHAMT [31/32]
+	.insn 0x49f59513
+	.insn 0x4a059513
+	# bseti a0,a1,SHAMT [31/32]
+	.insn 0x29f59513
+	.insn 0x2a059513
+	# binvi a0,a1,SHAMT [31/32]
+	.insn 0x69f59513
+	.insn 0x6a059513
+	# bexti a0,a1,SHAMT [31/32]
+	.insn 0x49f5d513
+	.insn 0x4a05d513
-- 
2.34.1



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