[PATCH v1] RISC-V: Support XVentanaCondOps extension

Philipp Tomsich philipp.tomsich@vrull.eu
Mon Jan 17 12:57:20 GMT 2022


Kito & Nelson,

On Sun, 9 Jan 2022 at 20:29, Philipp Tomsich <philipp.tomsich@vrull.eu>
wrote:

> Ventana Micro has published the specification for their
> XVentanaCondOps ("conditional ops") extension at
>
> https://github.com/ventanamicro/ventana-custom-extensions/releases/download/v1.0.0/ventana-custom-extensions-v1.0.0.pdf
> which contains two new instructions
>   - vt.maskc
>   - vt.maskcn
> that can be used in constructing branchless sequences for
> various conditional-arithmetic, conditional-logical, and
> conditional-select operations.
>
> To support such vendor-defined instructions in the mainline binutils,
> this change also adds a riscv_supported_vendor_x_ext secondary
> dispatch table (but also keeps the behaviour of allowing any unknow
> X-extension to be specified in addition to the known ones from this
> table).
>
> As discussed, this change already includes the planned/agreed future
> requirements for X-extensions (which are likely to be captured in the
> riscv-toolchain-conventions repository):
>   - a public specification document is available (see above) and is
>     referenced from the gas-documentation
>   - the naming follows chapter 27 of the RISC-V ISA specification
>   - instructions are prefixed by a vendor-prefix (vt for Ventana)
>     to ensure that they neither conflict with future standard
>     extensions nor clash with other vendors
>
> bfd/ChangeLog:
>
>         * elfxx-riscv.c (riscv_get_default_ext_version): Add
> riscv_supported_vendor_x_ext.
>         (riscv_multi_subset_supports): Recognize
> INSN_CLASS_XVENTANACONDOPS.
>
> gas/ChangeLog:
>
>         * doc/c-riscv.texi: Add section to list custom extensions and
>           their documentation URLs.
>         * testsuite/gas/riscv/x-ventana-condops.d: New test.
>         * testsuite/gas/riscv/x-ventana-condops.s: New test.
>
> include/ChangeLog:
>
>         * opcode/riscv-opc.h Add vt.maskc and vt.maskcn.
>         * opcode/riscv.h (enum riscv_insn_class): Add
> INSN_CLASS_XVENTANACONDOPS.
>
> opcodes/ChangeLog:
>
>         * riscv-opc.c: Add vt.maskc and vt.maskcn.


Given that this doesn't have any wider effects, I would like to merge this
for the next release.
Any feedback on this patch?

Thanks,
Philipp.


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