[PATCH 3/7] x86: move / quiesce pre-386 non-16-bit warning

H.J. Lu hjl.tools@gmail.com
Wed Aug 17 19:21:48 GMT 2022


On Tue, Aug 16, 2022 at 12:31 AM Jan Beulich <jbeulich@suse.com> wrote:
>
> Emitting this warning for every insn, including ones having actual
> errors, is annoying. Introduce a boolean variable to emit the warning
> just once on the first insn after .arch may have changed the things, and
> move the warning to output_insn(). (I didn't want to go as far as
> checking whether the .arch actually turned off the i386 bit, but doing
> so would be an option.)
> ---
> Otoh I wonder whether switching to a pre-386 architecture shouldn't
> automatically move to CODE_16BIT: Us emitting operand- or address-size
> prefixes violates the architecture specification. Alternatively we
> could outright reject such .arch directives when not already in 16-bit
> mode.
>
> I've left the message text unaltered, albeit I think "addressing mode"
> is particularly misleading for instructions without memory operands (nor
> any other address-size affected aspect, like in e.g. JCXZ).
>
> Originally I thought the warning may get in the way of work done in
> subsequent patches, but I think I've convinced myself that all affected
> insns are post-286 and hence wouldn't yield CPU_FLAGS_PERFECT_MATCH.
>
> --- a/gas/config/tc-i386.c
> +++ b/gas/config/tc-i386.c
> @@ -765,6 +765,9 @@ int optimize_align_code = 1;
>  /* Non-zero to quieten some warnings.  */
>  static int quiet_warnings = 0;
>
> +/* Guard to avoid repeated warnings about non-16-bit code on 16-bit CPUs.  */
> +static bool pre_386_16bit_warned;
> +
>  /* CPU name.  */
>  static const char *cpu_arch_name = NULL;
>  static char *cpu_sub_arch_name = NULL;
> @@ -2809,6 +2812,7 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED
>                       cpu_arch_tune = cpu_arch_isa;
>                       cpu_arch_tune_flags = cpu_arch_isa_flags;
>                     }
> +                 pre_386_16bit_warned = false;
>                   break;
>                 }
>
> @@ -5486,12 +5490,7 @@ parse_insn (char *line, char *mnemonic)
>      {
>        supported |= cpu_flags_match (t);
>        if (supported == CPU_FLAGS_PERFECT_MATCH)
> -       {
> -         if (!cpu_arch_flags.bitfield.cpui386 && (flag_code != CODE_16BIT))
> -           as_warn (_("use .code16 to ensure correct addressing mode"));
> -
> -         return l;
> -       }
> +       return l;
>      }
>
>    if (!(supported & CPU_FLAGS_64BIT_MATCH))
> @@ -9491,6 +9490,13 @@ output_insn (void)
>        fragP->tc_frag_data.max_bytes = max_branch_padding_size;
>      }
>
> +  if (!cpu_arch_flags.bitfield.cpui386 && (flag_code != CODE_16BIT)
> +      && !pre_386_16bit_warned)
> +    {
> +      as_warn (_("use .code16 to ensure correct addressing mode"));
> +      pre_386_16bit_warned = true;
> +    }
> +
>    /* Output jumps.  */
>    if (i.tm.opcode_modifier.jump == JUMP)
>      output_branch ();
>

OK.

Thanks.

-- 
H.J.


More information about the Binutils mailing list