[PATCH v4 3/3] RISC-V: Add 'Zmmul' failure testcases
Tsukasa OI
research_trasio@irq.a4lg.com
Tue Aug 9 03:37:27 GMT 2022
This commit adds failure testcases on 'Zmmul' extension with no 'M'
extension.
gas/ChangeLog:
* testsuite/gas/riscv/m-ext-fail-zmmul-32.d: New failure test
(RV32 + Zmmul but with no M).
* testsuite/gas/riscv/m-ext-fail-zmmul-32.l: Likewise.
* testsuite/gas/riscv/m-ext-fail-zmmul-64.d: New failure test
(RV64 + Zmmul but with no M).
* testsuite/gas/riscv/m-ext-fail-zmmul-64.l: Likewise.
* testsuite/gas/riscv/m-ext-fail-noarch-64.d: New failure test
(no Zmmul or M).
* testsuite/gas/riscv/m-ext-fail-noarch-64.l: Likewise.
---
gas/testsuite/gas/riscv/m-ext-fail-noarch-64.d | 4 ++++
gas/testsuite/gas/riscv/m-ext-fail-noarch-64.l | 14 ++++++++++++++
gas/testsuite/gas/riscv/m-ext-fail-zmmul-32.d | 4 ++++
gas/testsuite/gas/riscv/m-ext-fail-zmmul-32.l | 5 +++++
gas/testsuite/gas/riscv/m-ext-fail-zmmul-64.d | 4 ++++
gas/testsuite/gas/riscv/m-ext-fail-zmmul-64.l | 9 +++++++++
6 files changed, 40 insertions(+)
create mode 100644 gas/testsuite/gas/riscv/m-ext-fail-noarch-64.d
create mode 100644 gas/testsuite/gas/riscv/m-ext-fail-noarch-64.l
create mode 100644 gas/testsuite/gas/riscv/m-ext-fail-zmmul-32.d
create mode 100644 gas/testsuite/gas/riscv/m-ext-fail-zmmul-32.l
create mode 100644 gas/testsuite/gas/riscv/m-ext-fail-zmmul-64.d
create mode 100644 gas/testsuite/gas/riscv/m-ext-fail-zmmul-64.l
diff --git a/gas/testsuite/gas/riscv/m-ext-fail-noarch-64.d b/gas/testsuite/gas/riscv/m-ext-fail-noarch-64.d
new file mode 100644
index 00000000000..3c4fc9a0a50
--- /dev/null
+++ b/gas/testsuite/gas/riscv/m-ext-fail-noarch-64.d
@@ -0,0 +1,4 @@
+#as: -march=rv64i -defsym rv64=1
+#source: m-ext.s
+#objdump: -d
+#error_output: m-ext-fail-noarch-64.l
diff --git a/gas/testsuite/gas/riscv/m-ext-fail-noarch-64.l b/gas/testsuite/gas/riscv/m-ext-fail-noarch-64.l
new file mode 100644
index 00000000000..db9c8fb8396
--- /dev/null
+++ b/gas/testsuite/gas/riscv/m-ext-fail-noarch-64.l
@@ -0,0 +1,14 @@
+.*Assembler messages:
+.*: Error: unrecognized opcode `mul a0,a1,a2', extension `m' or `zmmul' required
+.*: Error: unrecognized opcode `mulh a0,a1,a2', extension `m' or `zmmul' required
+.*: Error: unrecognized opcode `mulhsu a0,a1,a2', extension `m' or `zmmul' required
+.*: Error: unrecognized opcode `mulhu a0,a1,a2', extension `m' or `zmmul' required
+.*: Error: unrecognized opcode `div a0,a1,a2', extension `m' required
+.*: Error: unrecognized opcode `divu a0,a1,a2', extension `m' required
+.*: Error: unrecognized opcode `rem a0,a1,a2', extension `m' required
+.*: Error: unrecognized opcode `remu a0,a1,a2', extension `m' required
+.*: Error: unrecognized opcode `mulw a0,a1,a2', extension `m' or `zmmul' required
+.*: Error: unrecognized opcode `divw a0,a1,a2', extension `m' required
+.*: Error: unrecognized opcode `divuw a0,a1,a2', extension `m' required
+.*: Error: unrecognized opcode `remw a0,a1,a2', extension `m' required
+.*: Error: unrecognized opcode `remuw a0,a1,a2', extension `m' required
diff --git a/gas/testsuite/gas/riscv/m-ext-fail-zmmul-32.d b/gas/testsuite/gas/riscv/m-ext-fail-zmmul-32.d
new file mode 100644
index 00000000000..c164fa96f8f
--- /dev/null
+++ b/gas/testsuite/gas/riscv/m-ext-fail-zmmul-32.d
@@ -0,0 +1,4 @@
+#as: -march=rv32i_zmmul
+#source: m-ext.s
+#objdump: -d
+#error_output: m-ext-fail-zmmul-32.l
diff --git a/gas/testsuite/gas/riscv/m-ext-fail-zmmul-32.l b/gas/testsuite/gas/riscv/m-ext-fail-zmmul-32.l
new file mode 100644
index 00000000000..01510012c4c
--- /dev/null
+++ b/gas/testsuite/gas/riscv/m-ext-fail-zmmul-32.l
@@ -0,0 +1,5 @@
+.*Assembler messages:
+.*: Error: unrecognized opcode `div a0,a1,a2', extension `m' required
+.*: Error: unrecognized opcode `divu a0,a1,a2', extension `m' required
+.*: Error: unrecognized opcode `rem a0,a1,a2', extension `m' required
+.*: Error: unrecognized opcode `remu a0,a1,a2', extension `m' required
diff --git a/gas/testsuite/gas/riscv/m-ext-fail-zmmul-64.d b/gas/testsuite/gas/riscv/m-ext-fail-zmmul-64.d
new file mode 100644
index 00000000000..f736d9c66c6
--- /dev/null
+++ b/gas/testsuite/gas/riscv/m-ext-fail-zmmul-64.d
@@ -0,0 +1,4 @@
+#as: -march=rv64i_zmmul -defsym rv64=1
+#source: m-ext.s
+#objdump: -d
+#error_output: m-ext-fail-zmmul-64.l
diff --git a/gas/testsuite/gas/riscv/m-ext-fail-zmmul-64.l b/gas/testsuite/gas/riscv/m-ext-fail-zmmul-64.l
new file mode 100644
index 00000000000..77799732e28
--- /dev/null
+++ b/gas/testsuite/gas/riscv/m-ext-fail-zmmul-64.l
@@ -0,0 +1,9 @@
+.*Assembler messages:
+.*: Error: unrecognized opcode `div a0,a1,a2', extension `m' required
+.*: Error: unrecognized opcode `divu a0,a1,a2', extension `m' required
+.*: Error: unrecognized opcode `rem a0,a1,a2', extension `m' required
+.*: Error: unrecognized opcode `remu a0,a1,a2', extension `m' required
+.*: Error: unrecognized opcode `divw a0,a1,a2', extension `m' required
+.*: Error: unrecognized opcode `divuw a0,a1,a2', extension `m' required
+.*: Error: unrecognized opcode `remw a0,a1,a2', extension `m' required
+.*: Error: unrecognized opcode `remuw a0,a1,a2', extension `m' required
--
2.34.1
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