[PATCH v3 0/3] RISC-V: Fix address printer on the disassembler
Palmer Dabbelt
palmer@dabbelt.com
Mon Aug 8 19:46:54 GMT 2022
On Mon, 08 Aug 2022 11:31:18 PDT (-0700), hpa@zytor.com wrote:
> Hi,
>
> I tried out this patch, but I noticed that it still gets jalr with a
> (zero) register base wrong:
>
> 40003764: 454000e7 jalr 1108(zero) # 0 <_NULL>
>
> The address here is obviously 1108 (0x454), not 0; there is a symbol at
> address 0x454:
>
> 00000454 T memcpy
I think this should do it
diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index 164fd209dbd..4c03f113650 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -397,7 +397,7 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info
case 'b':
case 's':
if ((l & MASK_JALR) == MATCH_JALR)
- maybe_print_address (pd, rs1, 0, 0);
+ maybe_print_address (pd, rs1, EXTRACT_ITYPE_IMM (l), 0);
print (info->stream, dis_style_register, "%s", riscv_gpr_names[rs1]);
break;
I haven't had a chance to look at the patch set in question, though, so
I'm not sure if I'm a bit behind.
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