[PATCH, v2] Fix 32-bit build for --enable-targets=all

Luis Machado luis.machado@arm.com
Fri Apr 22 13:25:13 GMT 2022


v2:

- Enable disassembler support for bpf, cris, loongarch and tilegx for
  32-bit BFD.  This prevents crashes when GDB tries to find a disassembler
  for these architectures and runs into a null pointer.

--

The following fixes the GDB build for 32-bit (tested on 32-bit arm)
for the following combinations:

* --enable-targets=all --disable-sim
* --enable-targets=all

Previously I was seeing failures of this kind:

binutils-gdb-armhf-bionic/sim/bpf/../../../../repos/binutils-gdb/sim/bpf/../common/sim-close.c:43:
undefined reference to `bpf_cgen_cpu_close`

binutils-gdb-armhf-bionic/sim/bpf/../../../../repos/binutils-gdb/sim/bpf/sim-if.c:166:
undefined reference to `bpf_cgen_cpu_open_1`

binutils-gdb-armhf-bionic/sim/bpf/../../../../repos/binutils-gdb/sim/bpf/sim-if.c:179:
undefined reference to `bpf_cgen_init_dis`

This particular combination of switches has not been tested for 32-bit
hosts in a while (since November/December 2021), so there might be bugs
that we need to address. The patch makes things build cleanly though.

Tested on aarch64-linux Ubuntu 20.04 and armhf-linux-gnueabi Ubuntu 18.04.

It would be nice to exercise this on other 32-bit targets, and get this
included in time for GDB 12.
---
 opcodes/Makefile.am   | 10 ++++++++++
 opcodes/Makefile.in   | 10 ++++++++++
 opcodes/disassemble.c |  4 ++++
 3 files changed, 24 insertions(+)

diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am
index afd19fa7785..681fbc07584 100644
--- a/opcodes/Makefile.am
+++ b/opcodes/Makefile.am
@@ -124,6 +124,11 @@ TARGET32_LIBOPCODES_CFILES = \
 	arm-dis.c \
 	avr-dis.c \
 	bfin-dis.c \
+	bpf-asm.c \
+	bpf-desc.c \
+	bpf-dis.c \
+	bpf-ibld.c \
+	bpf-opc.c \
 	cgen-asm.c \
 	cgen-bitset.c \
 	cgen-dis.c \
@@ -178,6 +183,9 @@ TARGET32_LIBOPCODES_CFILES = \
 	lm32-ibld.c \
 	lm32-opc.c \
 	lm32-opinst.c \
+	loongarch-opc.c \
+	loongarch-dis.c \
+	loongarch-coder.c \
 	m10200-dis.c \
 	m10200-opc.c \
 	m10300-dis.c \
@@ -234,6 +242,8 @@ TARGET32_LIBOPCODES_CFILES = \
 	ppc-opc.c \
 	pru-dis.c \
 	pru-opc.c \
+	riscv-dis.c \
+	riscv-opc.c \
 	rl78-decode.c \
 	rl78-dis.c \
 	rx-decode.c \
diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in
index 3ab8bfb0548..d3eee49b169 100644
--- a/opcodes/Makefile.in
+++ b/opcodes/Makefile.in
@@ -516,6 +516,11 @@ TARGET32_LIBOPCODES_CFILES = \
 	arm-dis.c \
 	avr-dis.c \
 	bfin-dis.c \
+	bpf-asm.c \
+	bpf-desc.c \
+	bpf-dis.c \
+	bpf-ibld.c \
+	bpf-opc.c \
 	cgen-asm.c \
 	cgen-bitset.c \
 	cgen-dis.c \
@@ -570,6 +575,9 @@ TARGET32_LIBOPCODES_CFILES = \
 	lm32-ibld.c \
 	lm32-opc.c \
 	lm32-opinst.c \
+	loongarch-opc.c \
+	loongarch-dis.c \
+	loongarch-coder.c \
 	m10200-dis.c \
 	m10200-opc.c \
 	m10300-dis.c \
@@ -626,6 +634,8 @@ TARGET32_LIBOPCODES_CFILES = \
 	ppc-opc.c \
 	pru-dis.c \
 	pru-opc.c \
+	riscv-dis.c \
+	riscv-opc.c \
 	rl78-decode.c \
 	rl78-dis.c \
 	rx-decode.c \
diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c
index bd1b90b3956..7228df40ec0 100644
--- a/opcodes/disassemble.c
+++ b/opcodes/disassemble.c
@@ -42,7 +42,9 @@
 #define ARCH_arm
 #define ARCH_avr
 #define ARCH_bfin
+#define ARCH_bpf
 #define ARCH_cr16
+#define ARCH_cris
 #define ARCH_crx
 #define ARCH_csky
 #define ARCH_d10v
@@ -58,6 +60,7 @@
 #define ARCH_ip2k
 #define ARCH_iq2000
 #define ARCH_lm32
+#define ARCH_loongarch
 #define ARCH_m32c
 #define ARCH_m32r
 #define ARCH_m68hc11
@@ -92,6 +95,7 @@
 #define ARCH_tic4x
 #define ARCH_tic54x
 #define ARCH_tic6x
+#define ARCH_tilegx
 #define ARCH_tilepro
 #define ARCH_v850
 #define ARCH_vax
-- 
2.25.1



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