[PATCH 1/3] RISC-V: Add mininal support for z[fdq]inx

jiawei jiawei@iscas.ac.cn
Thu Oct 28 16:47:21 GMT 2021


---
 bfd/elfxx-riscv.c      | 32 ++++++++++++++++++++++++++++++++
 gas/config/tc-riscv.c  |  7 +++++++
 include/opcode/riscv.h |  3 +++
 3 files changed, 42 insertions(+)

diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index cdb4fa0996a..e62c63abbb4 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1075,6 +1075,8 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
   {"q", "d",		check_implicit_always},
   {"d", "f",		check_implicit_always},
   {"f", "zicsr",	check_implicit_always},
+  {"zqinx", "zdinx",		check_implicit_always},
+  {"zdinx", "zfinx",		check_implicit_always},
   {NULL, NULL, NULL}
 };
 
@@ -1146,6 +1148,9 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] =
   {"zba",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {"zbc",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {"zbs",               ISA_SPEC_CLASS_DRAFT,           1, 0,  0 },
+  {"zfinx",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
+  {"zdinx",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
+  {"zqinx",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {NULL, 0, 0, 0, 0}
 };
 
@@ -1824,6 +1829,33 @@ riscv_parse_check_conflicts (riscv_parse_subset_t *rps)
         (_("rv32e does not support the `f' extension"));
       no_conflict = false;
     }
+  if (riscv_lookup_subset (rps->subset_list, "zfinx", &subset)
+      && (riscv_lookup_subset (rps->subset_list, "f", &subset)
+	  || riscv_lookup_subset (rps->subset_list, "d", &subset)
+	  || riscv_lookup_subset (rps->subset_list, "q", &subset)))
+    {
+      rps->error_handler
+        (_("`zfinx' is conflict with the `f/d/q' extension"));
+      no_conflict = false;
+    }
+  if (riscv_lookup_subset (rps->subset_list, "zdinx", &subset)
+      && (riscv_lookup_subset (rps->subset_list, "f", &subset)
+	  || riscv_lookup_subset (rps->subset_list, "d", &subset)
+	  || riscv_lookup_subset (rps->subset_list, "q", &subset)))
+    {
+      rps->error_handler
+        (_("`zdinx' is conflict with the `f/d/q' extension"));
+      no_conflict = false;
+    }
+  if (riscv_lookup_subset (rps->subset_list, "zqinx", &subset)
+      && (riscv_lookup_subset (rps->subset_list, "f", &subset)
+          || riscv_lookup_subset (rps->subset_list, "d", &subset)
+          || riscv_lookup_subset (rps->subset_list, "q", &subset)))
+    {
+      rps->error_handler
+        (_("`zqinx' is conflict with the `f/d/q' extension"));
+      no_conflict = false;
+    }
   return no_conflict;
 }
 
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index f7e0c929aa0..2c4df208664 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -286,6 +286,13 @@ riscv_multi_subset_supports (enum riscv_insn_class insn_class)
     case INSN_CLASS_ZBS:
       return riscv_subset_supports ("zbs");
 
+    case INSN_CLASS_ZFINX:
+      return riscv_subset_supports ("zfinx");
+    case INSN_CLASS_ZDINX:
+      return riscv_subset_supports ("zdinx");
+    case INSN_CLASS_ZQINX:
+      return riscv_subset_supports ("zqinx");
+
     default:
       as_fatal ("internal: unreachable");
       return false;
diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
index afcd41ff1dd..a23cd010e4a 100644
--- a/include/opcode/riscv.h
+++ b/include/opcode/riscv.h
@@ -320,6 +320,9 @@ enum riscv_insn_class
   INSN_CLASS_ZBB,
   INSN_CLASS_ZBC,
   INSN_CLASS_ZBS,
+  INSN_CLASS_ZFINX,
+  INSN_CLASS_ZDINX,
+  INSN_CLASS_ZQINX,
 };
 
 /* This structure holds information for a particular instruction.  */
-- 
2.25.1



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