[PATCH 0/2] RISC-V Disassembler Options Support

[Andrew Burgess]

* Nelson Chu <nelson.chu@sifive.com> [2021-11-26 15:48:56 +0800]:

> Hi Andrew,
> 
> I remember my previous comment was that - we should get the privileged spec
> names or classes from the bfd/cpu-riscv.h.  And the rewrite patches do it,
> so LGTM.  Please commit them when you think it is time.

Thanks, I've now pushed both these patches.

Andrew



> 
> Thanks
> Nelson
> 
> Andrew Burgess <aburgess@redhat.com>：
> 
> > This series is a refresh of this patch that was never merged:
> >
> >   https://sourceware.org/pipermail/binutils/2021-January/114944.html
> >
> > I actually created this series from scratch, copying code from the
> > MIPS implementation, and it was only when I was reviewing the change
> > prior to posting that it all seemed very familiar, and I remembered
> > Simon's earlier work.
> >
> > I believe I've addressed the review feedback from the earlier thread,
> > except that I have retained the help text that lists the valid
> > priv-spec values - not printing the valid values seems like a really
> > bad idea to me, so I'd prefer we kept that in.
> >
> > All feedback welcome.
> >
> > Thanks,
> > Andrew
> >
> > ---
> >
> > Andrew Burgess (2):
> >   opcodes/riscv: add disassembler options support to libopcodes
> >   gdb: add risc-v disassembler options support
> >
> >  gdb/riscv-tdep.c    |   8 +++
> >  include/ChangeLog   |   5 ++
> >  include/dis-asm.h   |   1 +
> >  opcodes/ChangeLog   |   9 +++
> >  opcodes/riscv-dis.c | 147 +++++++++++++++++++++++++++++++++++++++++---
> >  5 files changed, 161 insertions(+), 9 deletions(-)
> >
> > --
> > 2.25.4
> >
> >