PowerPC: Add new xxmr and xxlnot extended mnemonics [committed]

[Alan Modra]

On Thu, May 27, 2021 at 05:11:41PM -0500, Peter Bergner wrote:
> I committed the following patch to add a couple of extended mnemonics that
> should have been defined in the ISA document earlier, but weren't.  These
> new extended mnemonics will now show up in the next ISA release (whenever
> that is), but there's no need to wait for that.

Should these disassemble to xxlor and xxlnor with -Mraw?  This isn't a
new problem, lots of other instructions don't disassemble to the
underlying machine insn with -Mraw.  For example:

 xxmr 3,4
 xxlnot 3,4
 mr 3,4
 not 3,4
 xxspltd 3,4,0
 xxspltd 3,4,1
 xxmrghd 3,4,5
 xxmrgld 3,4,5
 xxswapd 3,4
 li 3,123
 blt .+4

objdump -d -Mraw displays

   0:	90 24 64 f0 	xxmr    vs3,vs4
   4:	10 25 64 f0 	xxlnot  vs3,vs4
   8:	78 23 83 7c 	mr      r3,r4
   c:	f8 20 83 7c 	not     r3,r4
  10:	50 20 64 f0 	xxspltd vs3,vs4,0
  14:	50 23 64 f0 	xxspltd vs3,vs4,1
  18:	50 28 64 f0 	xxpermdi vs3,vs4,vs5,0
  1c:	50 2b 64 f0 	xxpermdi vs3,vs4,vs5,3
  20:	50 22 64 f0 	xxpermdi vs3,vs4,vs4,2
  24:	7b 00 60 38 	addi    r3,0,123
  28:	04 00 80 41 	bc      12,lt,0x2c

with the first 6 insns not being the real hardware insns.  I think
-Mraw output really ought to be:

   0:	90 24 64 f0 	xxlor   vs3,vs4,vs4
   4:	10 25 64 f0 	xxlnor  vs3,vs4,vs4
   8:	78 23 83 7c 	or      r3,r4,r4
   c:	f8 20 83 7c 	nor     r3,r4,r4
  10:	50 20 64 f0 	xxpermdi vs3,vs4,vs4,0
  14:	50 23 64 f0 	xxpermdi vs3,vs4,vs4,3
  18:	50 28 64 f0 	xxpermdi vs3,vs4,vs5,0
  1c:	50 2b 64 f0 	xxpermdi vs3,vs4,vs5,3
  20:	50 22 64 f0 	xxpermdi vs3,vs4,vs4,2
  24:	7b 00 60 38 	addi    r3,0,123
  28:	04 00 80 41 	bc      12,lt,0x2c

The following hack produces this.  The idea is of course that we can
detect a specialisation involving matching register operands or the
like by simply counting the number of operands.

I'm going to glare at our opcode table a bit more before I commit
this.  :-)

	* ppc-dis.c (lookup_powerpc): When mask is the same, count
	operands to find underlying hardware insn for -Mraw.
	(lookup_prefix): Likewise.

diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c
index 739195a9910..7473ead9977 100644
--- a/opcodes/ppc-dis.c
+++ b/opcodes/ppc-dis.c
@@ -619,7 +619,10 @@ lookup_powerpc (uint64_t insn, ppc_cpu_t dialect)
 
       /* The raw machine insn is one that is not a specialization.  */
       if (last == NULL
-	  || (last->mask & ~opcode->mask) != 0)
+	  || (last->mask & ~opcode->mask) != 0
+	  || (last->mask == opcode->mask
+	      && (strnlen ((char *) last->operands, sizeof (last->operands))
+		  < strnlen ((char *) opcode->operands, sizeof (opcode->operands)))))
 	last = opcode;
     }
 
@@ -670,7 +673,10 @@ lookup_prefix (uint64_t insn, ppc_cpu_t dialect)
 
       /* The raw machine insn is one that is not a specialization.  */
       if (last == NULL
-	  || (last->mask & ~opcode->mask) != 0)
+	  || (last->mask & ~opcode->mask) != 0
+	  || (last->mask == opcode->mask
+	      && (strnlen ((char *) last->operands, sizeof (last->operands))
+		  < strnlen ((char *) opcode->operands, sizeof (opcode->operands)))))
 	last = opcode;
     }
 

-- 
Alan Modra
Australia Development Lab, IBM