[PATCH] RISC-V : Add linker support for further Z extensions

[Kito Cheng]

Allowing unrecognized extensions for linker sounds good to me, since
the ld.bfd might be used with clang/LLVM toolchain.

On Tue, May 25, 2021 at 8:42 PM Nelson Chu <nelson.chu@sifive.com> wrote:
>
> Hi Jessica,
>
> I understand that it isn't convenient that GNU FSF ld cannot link the
> objects, which are generated by llvm with those zb*, zv* and zfh
> extensions.  This is indeed a problem, thanks for pointing it out.
> One of the solutions is your proposed patch, just update the
> riscv_std_z_ext_strtab to make both assembler and linker recognize
> these extensions.  But I would suggest not only letting them be
> recognized if you want to update the table.  It would be better to let
> those extensions be useful.  Unfortunately, since the policies of the
> GNU and llvm toolchain are different for now, current binutils
> mainline cannot accept any draft and vendor stuff.  That's why I
> created the users/riscv/binutils-integration-branch to put the
> implementations of rvv and zfh extensions.  Therefore, I think the
> solution isn't suitable for now.
>
> But the inconsistent problem is still there, so maybe we can have a
> compromise that allows linker to link those unrecognized z extensions
> by updating the riscv_valid_prefixed_ext.  There should be more places
> that need to be changed, since the assembler and linker are sharing
> the same codes, but it would be great to only open this backdoor(?) to
> linker.
>
> Any suggestions?
>
> Thanks
> Nelson
>
> On Mon, May 24, 2021 at 11:30 PM Jessica Mills
> <jessica.mills@embecosm.com> wrote:
> >
> > From 3fd307fcb519732503c0a5aaaf25764fe9a0157c Mon Sep 17 00:00:00 2001
> > From: Jessica Mills <jessica.mills@embecosm.com>
> > Date: Mon, 24 May 2021 08:41:08 +0000
> > Subject: [PATCH] RISC-V : Add linker support for further Z extensions
> >
> > Add support to linker for the following Z features used in LLVM:
> >  - Bit manipulation: Zbe, Zbf, Zbm, Zbp, Zbr, Zbs and Zbt.
> >  - Half-precision floating-point: Zfh.
> >  - Vector segment load/store: Zvlsseg.
> >  - Vector AMO operations: Zvamo.
> >
> > bfd/ChangeLog:
> >
> >         * elfxx-riscv.c (riscv_std_z_ext_strtab): Add zbe, zbf, zbm, zbp,
> >         zbr, zbs, zbt, zfh, zvamo and zvlsseg.
> > ---
> >  bfd/ChangeLog     | 5 +++++
> >  bfd/elfxx-riscv.c | 3 ++-
> >  2 files changed, 7 insertions(+), 1 deletion(-)
> >
> > diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
> > index 7206ec8573b..d2a6a775b08 100644
> > --- a/bfd/elfxx-riscv.c
> > +++ b/bfd/elfxx-riscv.c
> > @@ -1077,7 +1077,8 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
> >
> >  static const char * const riscv_std_z_ext_strtab[] =
> >  {
> > -  "zba", "zbb", "zbc", "zicsr", "zifencei", "zihintpause", NULL
> > +  "zba", "zbb", "zbc", "zbe", "zbf", "zbm", "zbp", "zbr", "zbs", "zbt", "zfh",
> > +  "zicsr", "zifencei", "zihintpause", "zvamo", "zvlsseg", NULL
> >  };
> >
> >  static const char * const riscv_std_s_ext_strtab[] =
> > --
> > 2.17.1