[PATCH 2/6] x86: shrink some struct insn_template fields
Jan Beulich
jbeulich@suse.com
Fri Mar 26 10:50:54 GMT 2021
Now that all base opcodes are only at most 2 bytes in size, shrink its
template field to just as much. By also shrinking extension_opcode and
operands to just what they really need, we can free up an entire 32-bit
slot (plus 4 left bits past the bitfields themselves).
At present this alters sizeof(struct insn_template) only for 32-bit
builds. In 64-bit builds it instead leaves a padding hole that will
allow to buffer future growth of other fields (opcode_modifier,
cpu_flags, operand_types[]).
opcodes/
2021-03-XX Jan Beulich <jbeulich@suse.com>
* i386-opc.h (struct insn_template): Shrink base_opcode to 16
bits. Shrink extension_opcode to 9 bits. Make it signed. Change
value of None. Shrink operands to 3 bits.
---
Code-generation wise it may be better to move the signed
extension_opcode field last within the containing 32-bit slot.
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -917,7 +917,7 @@ typedef struct insn_template
/* base_opcode is the fundamental opcode byte without optional
prefix(es). */
- unsigned int base_opcode;
+ unsigned int base_opcode:16;
#define Opcode_D 0x2 /* Direction bit:
set if Reg --> Regmem;
unset if Regmem --> Reg. */
@@ -934,8 +934,8 @@ typedef struct insn_template
AMD 3DNow! instructions.
If this template has no extension opcode (the usual case) use None
Instructions */
- unsigned short extension_opcode;
-#define None 0xffff /* If no extension_opcode is possible. */
+ signed int extension_opcode:9;
+#define None (-1) /* If no extension_opcode is possible. */
/* Pseudo prefixes. */
#define Prefix_Disp8 0 /* {disp8} */
@@ -950,7 +950,7 @@ typedef struct insn_template
#define Prefix_NoOptimize 9 /* {nooptimize} */
/* how many operands */
- unsigned char operands;
+ unsigned int operands:3;
/* the bits in opcode_modifier are used to generate the final opcode from
the base_opcode. These bits also are used to detect alternate forms of
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