[PATCH v3 2/2] RISC-V: Extend .insn directive to support hardcode encoding.

[Nelson Chu]

On Wed, Jul 14, 2021 at 12:56 AM Kito Cheng <kito.cheng@gmail.com> wrote:
>
> Seems the document update is missing.

Oops, it is missing.

> > diff --git a/gas/testsuite/gas/riscv/insn.d b/gas/testsuite/gas/riscv/insn.d
> > index 8cb3d64b1a5..4edacc63368 100644
> > --- a/gas/testsuite/gas/riscv/insn.d
> > +++ b/gas/testsuite/gas/riscv/insn.d
> > @@ -69,3 +69,9 @@ Disassembly of section .text:
> >  [^:]+:[        ]+00c58533[     ]+add[  ]+a0,a1,a2
> >  [^:]+:[        ]+00c58533[     ]+add[  ]+a0,a1,a2
> >  [^:]+:[        ]+00c58533[     ]+add[  ]+a0,a1,a2
> > +[^:]+:[        ]+0001[         ]+nop
> > +[^:]+:[        ]+00000013[     ]+nop
> > +[^:]+:[        ]+00000057[     ]+0x57
> Maybe we can output ".insn 00000057" here, since mapping symbol give
> us confidence that is instruction?

Make sense, thanks for the reminder.

Nelson