[PATCH 1/2] [PATCH 1/2] Enable Intel AVX512_FP16 instructions

Cui, Lili lili.cui@intel.com
Tue Jul 13 07:35:18 GMT 2021


> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Tuesday, July 13, 2021 3:26 PM
> To: Cui, Lili <lili.cui@intel.com>
> Cc: hjl.tools@gmail.com; binutils@sourceware.org
> Subject: Re: [PATCH 1/2] [PATCH 1/2] Enable Intel AVX512_FP16 instructions
> 
> On 09.07.2021 13:52, Cui, Lili wrote:
> >> From: Jan Beulich <jbeulich@suse.com>
> >> Sent: Friday, July 2, 2021 9:42 PM
> >>
> >> On 01.07.2021 09:47, Cui,Lili wrote:
> >>>  opcodes/i386-opc.tbl           | 376 +++++++++++++++++++++
> >>
> >> May I suggest SpaceEVexMap{5,6} to become just EVexMap{5,6}?
> >> The table entries are hard enough to read, being partly far over 200
> columns.
> >> Any unambiguous shortening of names is a win imo.
> >>
> > I changed it to EVexMap{5,6} and put it behind with other VEX.m-mmmm
> interpretation. Do you think SpaceEVexMap{5,6} is better? because it
> maintains the same style as the others.
> >
> > #define Space0F    OpcodeSpace=SPACE_0F
> > #define Space0F38  OpcodeSpace=SPACE_0F38 #define Space0F3A
> > OpcodeSpace=SPACE_0F3A #define SpaceXOP08
> OpcodeSpace=SPACE_XOP08
> > #define SpaceXOP09 OpcodeSpace=SPACE_XOP09 #define SpaceXOP0A
> > OpcodeSpace=SPACE_XOP0A
> >
> > #define EVexMap5 OpcodeSpace=SPACE_EVEXMAP5 #define EVexMap6
> > OpcodeSpace=SPACE_EVEXMAP6
> 
> The shorter form you have seems better to me.
> 
OK,  thanks.

> >> You appear to be adding IgnoreSize to most (all?) SAE templates. May
> >> I ask why that is? I've taken quite a bit of time over the last
> >> couple of years to remove stray uses, and I'd really prefer if no
> >> unneeded new ones got introduced.
> >>
> > Sorry for that, I nearly deleted  all IgnoreSize For FP16, except
> > vcvtph2psx, vcvtsi2sh and vcvtusi2sh. This patch was written a few
> > years ago,
> 
> A few _years_ ago? Oh.
> 
 Yes, more than two years ago.

> Jan
> 
> > the part of IgnoreSize was not updated with community.



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