[PATCH 2/2] [PATCH 2/2] Add tests for Intel AVX512_FP16 instructions

[Jan Beulich]

On 01.07.2021 09:47, Cui,Lili wrote:
> 
> Intel AVX512 FP16 instructions use maps 3, 5 and 6. Maps 5 and 6 use 3 bits
> in the EVEX.mmm field (0b101, 0b110). Map 5 is for instructions that were FP32
> in map 1 (0Fxx). Map 6 is for instructions that were FP32 in map 2 (0F38xx).
> There are some exceptions to this rule. Some things in map 1 (0Fxx) with imm8
> operands predated our current conventions; those instructions moved to map 3.
> FP32 things in map 3 (0F3Axx) found new opcodes in map3 for FP16 because map3
> is very sparsely populated. Most of the FP16 instructions share opcodes and
> prefix (EVEX.pp) bits with the related FP32 operations.
> 
> Intel AVX512 FP16 instructions has new displacements scaling rules, please refer
> to the public software developer manual for detail information.
> 
> gas/
> 
> 2021-07-01  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
>             H.J. Lu  <hongjiu.lu@intel.com>
>             Wei Xiao <wei3.xiao@intel.com>
>             Lili Cui  <lili.cui@intel.com>
> 
> 	* gas/testsuite/gas/i386/i386.exp: Run FP16 tests.
> 	* gas/testsuite/gas/i386/avx512_fp16-intel.d: New test.
> 	* gas/testsuite/gas/i386/avx512_fp16-inval-bcast.l: Ditto.
> 	* gas/testsuite/gas/i386/avx512_fp16-inval-bcast.s: Ditto.
> 	* gas/testsuite/gas/i386/avx512_fp16.d: Ditto.
> 	* gas/testsuite/gas/i386/avx512_fp16.s: Ditto.

This, just to pick an example, has

	vaddph	8128(%ecx), %zmm5, %zmm6	 #AVX512_FP16 Disp8
	vaddph	-8192(%edx){1to32}, %zmm5, %zmm6{%k7}{z}	 #AVX512_FP16 Disp8 BROADCAST_EN MASK_ENABLING ZEROCTL

The former is indeed using disp8, but the latter isn't despite the
comment suggesting so. I'd consider it particularly important that
disp8-scaling be covered both without and with broadcast, yet I
don't think I've been able to spot any instance of the latter.

> 	* gas/testsuite/gas/i386/avx512_fp16_disp8-intel.d: Ditto.
> 	* gas/testsuite/gas/i386/avx512_fp16_disp8.d: Ditto.
> 	* gas/testsuite/gas/i386/avx512_fp16_disp8.s: Ditto.

So what are these about? Their name suggests disp8 handling, but
the produced code has no single instance of an 8-bit displacement.
Same for the 64-bit equivalents further down.

Overall this patch if of course close to impossible to review
properly.

Jan