[PATCH v4 0/8] RISC-V: Implement support for big endian targets
Nelson Chu
nelson.chu@sifive.com
Wed Jan 6 10:22:43 GMT 2021
Committed. I add some descriptions and do some minor changes in the
ChangLogs. Hope you don't mind :)
Thanks
Nelson
On Wed, Jan 6, 2021 at 5:50 AM Marcus Comstedt <marcus@mc.pp.se> wrote:
>
> This is an updated patch series for big endian RISC-V support.
> Changes since v3:
>
> * Removed changes to config.sub, which has already been updated
>
> * Fixed the incorrect setup of the "abis" variable in ld-riscv-elf.exp
>
> * Removed documentation of the abbreviated option forms "-mlittle" and
> "-mbig"
>
>
More information about the Binutils
mailing list