[v1 0/4]riscv/binutils support Hypervisor Extension

[Nelson Chu]

Hi Palmer, Hi Vineet,

Thanks for all the series of patches, looks good to me, except some
minor issues, so I leave some comments in the related patches.  But
since I need to commit the rewritten csr testcases, I committed Vineet
patches with the minor changes directly.

Thanks
Nelson

On Thu, Dec 23, 2021 at 9:35 AM Palmer Dabbelt <palmer@dabbelt.com> wrote:
>
> On Mon, 20 Dec 2021 18:34:11 PST (-0800), Vineet Gupta wrote:
> > Hi,
> >
> > This patchset adds support for Hypervisor Extension ratified recently
> > [1].
> >
> > Changes since RFC [2]:
> >
> >   - Drop support for single-letter arch string "h".
> >     'H' extension is currently supported unconditionally so keep status quo.
>
> WFM: there's no name for this, so just keeping it as part of the base
> ISA seems like the best we can do.  It certainly matches the precedent
> we've set a bunch of times before, and holding this up because we can't
> name it is just silly.
>
> >   - H-ext support in Priv spec 1.9.1 dropped, broken out as seperate patch.
> >
> > Please review/comment !
>
> I think I said this in the RFC, but we generally don't drop support for
> stuff we have.  In theory removing the 1.9.1 CSRs is something that
> would break users, but I think we're pretty safe here because these
> vestigial bits of the hypervisor extension never really did anything so
>
> Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
>
> In the unlikely event that anyone's actually using this, now's the time
> to speak up!
>
> Thanks!
>
> > Thx,
> > -Vineet
> >
> > [1] https://wiki.riscv.org/display/TECH/Recently+Ratified+Extensions
> > [2] https://sourceware.org/pipermail/binutils/2021-December/118914.html
> >
> > Vineet Gupta (4):
> >   RISC-V: Hypervisor ext: drop Privileged Spec 1.9.1
> >     implementation/tests
> >   RISC-V: Hypervisor ext: support Privileged Spec 1.12
> >   RISC-V: Hypervisor Ext: Add tests
> >   RISC-V: fix a comment for adding CSR entry and annotate switch-break
> >
> >  bfd/cpu-riscv.c                               |   1 +
> >  bfd/cpu-riscv.h                               |   1 +
> >  bfd/elfxx-riscv.c                             |   6 +
> >  gas/config/tc-riscv.c                         |  10 +-
> >  gas/testsuite/gas/riscv/csr-dw-regnums.d      |  10 --
> >  gas/testsuite/gas/riscv/csr-dw-regnums.s      |  10 --
> >  gas/testsuite/gas/riscv/h-ext-32.d            |  74 ++++++++++++
> >  gas/testsuite/gas/riscv/h-ext-32.s            |  64 ++++++++++
> >  gas/testsuite/gas/riscv/h-ext-64.d            |  73 ++++++++++++
> >  gas/testsuite/gas/riscv/h-ext-64.s            |  63 ++++++++++
> >  .../gas/riscv/priv-reg-fail-read-only-01.s    |  10 --
> >  .../gas/riscv/priv-reg-fail-version-1p10.l    |  10 --
> >  .../gas/riscv/priv-reg-fail-version-1p11.l    |  10 --
> >  .../gas/riscv/priv-reg-version-1p10.d         |  10 --
> >  .../gas/riscv/priv-reg-version-1p11.d         |  10 --
> >  .../gas/riscv/priv-reg-version-1p9p1.d        |  10 --
> >  gas/testsuite/gas/riscv/priv-reg.s            |  10 --
> >  gas/testsuite/gas/riscv/svinval-and-h.d       |  15 +++
> >  gas/testsuite/gas/riscv/svinval-and-h.s       |   5 +
> >  include/opcode/riscv-opc.h                    | 110 ++++++++++++++----
> >  include/opcode/riscv.h                        |   2 +
> >  opcodes/riscv-opc.c                           |  26 ++++-
> >  22 files changed, 423 insertions(+), 117 deletions(-)
> >  create mode 100644 gas/testsuite/gas/riscv/h-ext-32.d
> >  create mode 100644 gas/testsuite/gas/riscv/h-ext-32.s
> >  create mode 100644 gas/testsuite/gas/riscv/h-ext-64.d
> >  create mode 100644 gas/testsuite/gas/riscv/h-ext-64.s
> >  create mode 100644 gas/testsuite/gas/riscv/svinval-and-h.d
> >  create mode 100644 gas/testsuite/gas/riscv/svinval-and-h.s