Adds support for including loongarch control and status registers into core files.

[Alan Modra]

On Sat, Aug 07, 2021 at 10:00:12AM +0800, 刘振松 wrote:
> diff --git a/include/elf/common.h b/include/elf/common.h
> index 0d381f0d27b..df3a660c5ac 100644
> --- a/include/elf/common.h
> +++ b/include/elf/common.h
> @@ -678,6 +678,16 @@
>  #define NT_ARC_V2	0x600		/* ARC HS accumulator/extra registers.  */
>  					/*   note name must be "LINUX".  */
>  #define NT_RISCV_CSR    0x900		/* RISC-V Control and Status Registers */
> +                    /*   note name must be "LINUX".  */
> +#define NT_LARCH_CPUCFG 0xa00		/* Loongarch CPU config registers */
> +                    /*   note name must be "LINUX".  */
> +#define NT_LARCH_CSR    0xa01		/* Loongarch control state registers */
> +                    /*   note name must be "LINUX".  */
> +#define NT_LARCH_LSX    0xa02       /* Loongarch Loongson SIMD Extension registers */
> +                    /*   note name must be "LINUX".  */
> +#define NT_LARCH_LASX   0xa03       /* Loongarch Loongson Advanced SIMD Extension registers */
> +                    /*   note name must be "LINUX".  */
> +#define NT_LARCH_LBT    0xa04       /* Loongarch Loongson Binary Translation registers */
>  					/*   note name must be "CORE".  */
>  #define NT_SIGINFO	0x53494749	/* Fields of siginfo_t.  */
>  #define NT_FILE		0x46494c45	/* Description of mapped files.  */

OK.

-- 
Alan Modra
Australia Development Lab, IBM