Enable Intel AVX512_FP16 instructions and test

[Jan Beulich]

On 04.08.2021 16:40, Cui, Lili wrote:
>> From: Jan Beulich <jbeulich@suse.com>
>> Sent: Tuesday, August 3, 2021 10:23 PM
>>
>> On 30.07.2021 11:00, Cui, Lili wrote:
>>> Rebased AVX512-FP16 patch and added error checking for some
>>> instructions that require different destination and source registers
>>
>> I can't seem to be able to spot respective disassembler changes? (I have to
>> also admit that the restriction is quite well hidden in the spec - there's no
>> mention of it except in the "Additionally:" sections. I'd have expected such
>> special cases to be mentioned in "Operation" as well.)
>>
> Add distinct register check for disassembler and also add test case for it, thanks.
> 
>> I'm not sure a new insn attribute is warranted here (iirc you got away
>> without for the AMX special restrictions), but I also don't really want to
>> request that you redo this. What I would like to see improved though is the
>> name: It would better express that it's the destination that needs to be
>> distinct (unlike for the AMX insns, where all registers need to be distinct).
>> Also the error message wording "destination and source registers must be
>> distinct" is ambiguous (one may read it to mean the same as what the AMX
>> requirement is). I'd suggest "destination must be distinct from source
>> registers".
>>
> Done.

Hmm, I see you've changed the message (which, seeing it again, is still
ambiguous I'm afraid), but you've kept the field name.

As to the message (I'm sorry for adjusting my prior suggestion), how
about "destination must be distinct from source registers"?

Jan