[PATCH] RISC-V: Update debug csr to 1.0, and support the version controlling.
Nelson Chu
nelson.chu@sifive.com
Mon Aug 2 12:59:41 GMT 2021
* Changed from debug spec 0.13 to 1.0:
Updated scontext from 0x7aa to 0x5a8.
Added hcontext, 0x6a8.
Added mscontext, 0x7aa.
Added mcontrol6, which is the alias of tdada1 (0x7a1).
Added tmexttrigger, which is the alias of tdada1 (0x7a1).
Since the scontext conflict, we need the version controlling for debug spec,
just like what we did for privileged spec. Besides, we also need to support
the following new options,
gas option, -mdebug-spec=<versions>,
gas configure option, --with-debug-spec<versions>
objdump option, -Mdebug-spec=<versions>
<versions> should be 0.13, 0.14 and 1.0.
Not that, the csr dscratch should be controlled by debug spec, although it is
defined in the privileged spec 1.0. However, it seems to be dropped already
since debug spec 0.13, so I remove it in this patch.
bfd/
* cpu-riscv.c (riscv_debug_specs): Added.
* cpu-riscv.h (enum riscv_spec_class): Added DEBUG_SPEC_CLASS*.
(RISCV_GET_DEBUG_SPEC_CLASS, RISCV_GET_DEBUG_SPEC_NAME): Added.
gas/
* config/tc-riscv.c (enum riscv_csr_class): Moved to include/opcode/riscv.h.
(DEFAULT_RISCV_DEBUG_SPEC, default_debug_spec): Set by -mdebug-spec
and --with-debug-spec, otherwise it is 1.0 by default.
(riscv_after_parse_args): Likewise.
(riscv_set_default_debug_spec): New function.
(riscv_csr_address): Updated to control the debug csrs by debug spec.
(enum options, md_longopts, md_parse_option): Added new option
-mdebug-spec.
(md_show_usage): Updated --help.
* doc/c-riscv.texi: Updated document.
* configure.ac: Added --with-debug-spec.
* configure: Regenerated.
* config.in: Regenerated.
* testsuite/gas/riscv/csr-debug-fail-version-0p13.d: New testcase.
* testsuite/gas/riscv/csr-debug-fail-version-0p13.l: Likewise.
* testsuite/gas/riscv/csr-debug-version-0p13.d: Likewise.
* testsuite/gas/riscv/csr-debug-version-1p0.d: Likewise.
* testsuite/gas/riscv/csr-debug.s: Likewise.
* testsuite/gas/riscv/csr-dw-regnums.d: Updated and removed dscratch.
* testsuite/gas/riscv/csr-dw-regnums.s: Likewise.
(All testsuite/gas/riscv/priv-reg* files are renamed to csr-priv*)
include/
* opcode/riscv-opc.h: Updated csrs.
* opcode/riscv.h: Added enum riscv_csr_class.
opcodes/
* riscv-dis.c (default_debug_spec): Set by -Mdebug-spec.
(parse_riscv_dis_option): Added -Mdebug-spec option.
(print_insn_args): Set default_debug_spec to the newest version by default.
And then dump the csrs according to the chosen debug spec.
---
bfd/cpu-riscv.c | 8 ++
bfd/cpu-riscv.h | 13 ++++
gas/config.in | 3 +
gas/config/tc-riscv.c | 77 ++++++++++++-------
gas/configure | 15 +++-
gas/configure.ac | 10 ++-
gas/doc/c-riscv.texi | 9 +++
.../gas/riscv/csr-debug-fail-version-0p13.d | 3 +
.../gas/riscv/csr-debug-fail-version-0p13.l | 5 ++
.../gas/riscv/csr-debug-version-0p13.d | 32 ++++++++
.../gas/riscv/csr-debug-version-1p0.d | 32 ++++++++
gas/testsuite/gas/riscv/csr-debug.s | 29 +++++++
gas/testsuite/gas/riscv/csr-dw-regnums.d | 13 ++--
gas/testsuite/gas/riscv/csr-dw-regnums.s | 16 ++--
gas/testsuite/gas/riscv/csr-priv-fail-fext.d | 3 +
...v-reg-fail-fext.l => csr-priv-fail-fext.l} | 0
.../gas/riscv/csr-priv-fail-nonexistent.d | 3 +
...existent.l => csr-priv-fail-nonexistent.l} | 0
...existent.s => csr-priv-fail-nonexistent.s} | 0
.../gas/riscv/csr-priv-fail-read-only-01.d | 3 +
...only-01.l => csr-priv-fail-read-only-01.l} | 0
...only-01.s => csr-priv-fail-read-only-01.s} | 1 -
.../gas/riscv/csr-priv-fail-read-only-02.d | 3 +
...only-02.l => csr-priv-fail-read-only-02.l} | 0
...only-02.s => csr-priv-fail-read-only-02.s} | 0
.../gas/riscv/csr-priv-fail-rv32-only.d | 3 +
...-rv32-only.l => csr-priv-fail-rv32-only.l} | 0
...on-1p10.d => csr-priv-fail-version-1p10.d} | 4 +-
...on-1p10.l => csr-priv-fail-version-1p10.l} | 0
...on-1p11.d => csr-priv-fail-version-1p11.d} | 4 +-
...on-1p11.l => csr-priv-fail-version-1p11.l} | 0
...-1p9p1.d => csr-priv-fail-version-1p9p1.d} | 4 +-
...-1p9p1.l => csr-priv-fail-version-1p9p1.l} | 0
...do-noalias.d => csr-priv-pseudo-noalias.d} | 2 +-
.../{priv-reg-pseudo.d => csr-priv-pseudo.d} | 2 +-
.../{priv-reg-pseudo.s => csr-priv-pseudo.s} | 0
...version-1p10.d => csr-priv-version-1p10.d} | 21 +----
...version-1p11.d => csr-priv-version-1p11.d} | 21 +----
...rsion-1p9p1.d => csr-priv-version-1p9p1.d} | 21 +----
.../gas/riscv/{priv-reg.s => csr-priv.s} | 23 ------
gas/testsuite/gas/riscv/priv-reg-fail-fext.d | 3 -
.../gas/riscv/priv-reg-fail-nonexistent.d | 3 -
.../gas/riscv/priv-reg-fail-read-only-01.d | 3 -
.../gas/riscv/priv-reg-fail-read-only-02.d | 3 -
.../gas/riscv/priv-reg-fail-rv32-only.d | 3 -
include/opcode/riscv-opc.h | 56 ++++++++------
include/opcode/riscv.h | 12 ++-
opcodes/riscv-dis.c | 21 ++++-
48 files changed, 313 insertions(+), 174 deletions(-)
create mode 100644 gas/testsuite/gas/riscv/csr-debug-fail-version-0p13.d
create mode 100644 gas/testsuite/gas/riscv/csr-debug-fail-version-0p13.l
create mode 100644 gas/testsuite/gas/riscv/csr-debug-version-0p13.d
create mode 100644 gas/testsuite/gas/riscv/csr-debug-version-1p0.d
create mode 100644 gas/testsuite/gas/riscv/csr-debug.s
create mode 100644 gas/testsuite/gas/riscv/csr-priv-fail-fext.d
rename gas/testsuite/gas/riscv/{priv-reg-fail-fext.l => csr-priv-fail-fext.l} (100%)
create mode 100644 gas/testsuite/gas/riscv/csr-priv-fail-nonexistent.d
rename gas/testsuite/gas/riscv/{priv-reg-fail-nonexistent.l => csr-priv-fail-nonexistent.l} (100%)
rename gas/testsuite/gas/riscv/{priv-reg-fail-nonexistent.s => csr-priv-fail-nonexistent.s} (100%)
create mode 100644 gas/testsuite/gas/riscv/csr-priv-fail-read-only-01.d
rename gas/testsuite/gas/riscv/{priv-reg-fail-read-only-01.l => csr-priv-fail-read-only-01.l} (100%)
rename gas/testsuite/gas/riscv/{priv-reg-fail-read-only-01.s => csr-priv-fail-read-only-01.s} (98%)
create mode 100644 gas/testsuite/gas/riscv/csr-priv-fail-read-only-02.d
rename gas/testsuite/gas/riscv/{priv-reg-fail-read-only-02.l => csr-priv-fail-read-only-02.l} (100%)
rename gas/testsuite/gas/riscv/{priv-reg-fail-read-only-02.s => csr-priv-fail-read-only-02.s} (100%)
create mode 100644 gas/testsuite/gas/riscv/csr-priv-fail-rv32-only.d
rename gas/testsuite/gas/riscv/{priv-reg-fail-rv32-only.l => csr-priv-fail-rv32-only.l} (100%)
rename gas/testsuite/gas/riscv/{priv-reg-fail-version-1p10.d => csr-priv-fail-version-1p10.d} (76%)
rename gas/testsuite/gas/riscv/{priv-reg-fail-version-1p10.l => csr-priv-fail-version-1p10.l} (100%)
rename gas/testsuite/gas/riscv/{priv-reg-fail-version-1p11.d => csr-priv-fail-version-1p11.d} (76%)
rename gas/testsuite/gas/riscv/{priv-reg-fail-version-1p11.l => csr-priv-fail-version-1p11.l} (100%)
rename gas/testsuite/gas/riscv/{priv-reg-fail-version-1p9p1.d => csr-priv-fail-version-1p9p1.d} (78%)
rename gas/testsuite/gas/riscv/{priv-reg-fail-version-1p9p1.l => csr-priv-fail-version-1p9p1.l} (100%)
rename gas/testsuite/gas/riscv/{priv-reg-pseudo-noalias.d => csr-priv-pseudo-noalias.d} (98%)
rename gas/testsuite/gas/riscv/{priv-reg-pseudo.d => csr-priv-pseudo.d} (98%)
rename gas/testsuite/gas/riscv/{priv-reg-pseudo.s => csr-priv-pseudo.s} (100%)
rename gas/testsuite/gas/riscv/{priv-reg-version-1p10.d => csr-priv-version-1p10.d} (92%)
rename gas/testsuite/gas/riscv/{priv-reg-version-1p11.d => csr-priv-version-1p11.d} (92%)
rename gas/testsuite/gas/riscv/{priv-reg-version-1p9p1.d => csr-priv-version-1p9p1.d} (92%)
rename gas/testsuite/gas/riscv/{priv-reg.s => csr-priv.s} (91%)
delete mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-fext.d
delete mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-nonexistent.d
delete mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d
delete mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-read-only-02.d
delete mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d
diff --git a/bfd/cpu-riscv.c b/bfd/cpu-riscv.c
index 025e94afd34..b18117a9283 100644
--- a/bfd/cpu-riscv.c
+++ b/bfd/cpu-riscv.c
@@ -119,6 +119,14 @@ const struct riscv_spec riscv_priv_specs[] =
{"1.11", PRIV_SPEC_CLASS_1P11},
};
+/* List for all supported debug spec versions. */
+const struct riscv_spec riscv_debug_specs[] =
+{
+ {"0.13", DEBUG_SPEC_CLASS_0P13},
+ {"0.14", DEBUG_SPEC_CLASS_0P14},
+ {"1.0", DEBUG_SPEC_CLASS_1P0},
+};
+
/* Get the corresponding CSR version class by giving privilege
version numbers. It is usually used to convert the priv
attribute numbers into the corresponding class. */
diff --git a/bfd/cpu-riscv.h b/bfd/cpu-riscv.h
index cafaca23be0..9946feac741 100644
--- a/bfd/cpu-riscv.h
+++ b/bfd/cpu-riscv.h
@@ -33,6 +33,13 @@ enum riscv_spec_class
PRIV_SPEC_CLASS_1P10,
PRIV_SPEC_CLASS_1P11,
PRIV_SPEC_CLASS_DRAFT,
+
+ /* Debug spec. */
+ DEBUG_SPEC_CLASS_NONE,
+ DEBUG_SPEC_CLASS_0P13,
+ DEBUG_SPEC_CLASS_0P14,
+ DEBUG_SPEC_CLASS_1P0,
+ DEBUG_SPEC_CLASS_DRAFT,
};
struct riscv_spec
@@ -43,6 +50,7 @@ struct riscv_spec
extern const struct riscv_spec riscv_isa_specs[];
extern const struct riscv_spec riscv_priv_specs[];
+extern const struct riscv_spec riscv_debug_specs[];
#define RISCV_GET_SPEC_CLASS(UTYPE, LTYPE, NAME, CLASS) \
do \
@@ -71,8 +79,13 @@ extern const struct riscv_spec riscv_priv_specs[];
RISCV_GET_SPEC_CLASS(ISA, isa, NAME, CLASS)
#define RISCV_GET_PRIV_SPEC_CLASS(NAME, CLASS) \
RISCV_GET_SPEC_CLASS(PRIV, priv, NAME, CLASS)
+#define RISCV_GET_DEBUG_SPEC_CLASS(NAME, CLASS) \
+ RISCV_GET_SPEC_CLASS(DEBUG, debug, NAME, CLASS)
+
#define RISCV_GET_PRIV_SPEC_NAME(NAME, CLASS) \
RISCV_GET_SPEC_NAME(PRIV, priv, NAME, CLASS)
+#define RISCV_GET_DEBUG_SPEC_NAME(NAME, CLASS) \
+ RISCV_GET_SPEC_NAME(DEBUG, debug, NAME, CLASS)
extern void
riscv_get_priv_spec_class_from_numbers (unsigned int,
diff --git a/gas/config.in b/gas/config.in
index e243fd277ee..3be2a9f5515 100644
--- a/gas/config.in
+++ b/gas/config.in
@@ -51,6 +51,9 @@
/* Define to 1 if you want to generate RISC-V arch attribute by default. */
#undef DEFAULT_RISCV_ATTR
+/* Define default value for RISC-V -mdebug-spec */
+#undef DEFAULT_RISCV_DEBUG_SPEC
+
/* Define default value for RISC-V -misa-spec. */
#undef DEFAULT_RISCV_ISA_SPEC
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index 460667e4349..6e05ea477f8 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -56,17 +56,6 @@ struct riscv_cl_insn
fixS *fixp;
};
-/* All RISC-V CSR belong to one of these classes. */
-enum riscv_csr_class
-{
- CSR_CLASS_NONE,
-
- CSR_CLASS_I,
- CSR_CLASS_I_32, /* rv32 only */
- CSR_CLASS_F, /* f-ext only */
- CSR_CLASS_DEBUG /* debug CSR */
-};
-
/* This structure holds all restricted conditions for a CSR. */
struct riscv_csr_extra
{
@@ -169,10 +158,15 @@ static const struct riscv_ext_version ext_version_table[] =
#define DEFAULT_RISCV_PRIV_SPEC "1.11"
#endif
+#ifndef DEFAULT_RISCV_DEBUG_SPEC
+#define DEFAULT_RISCV_DEBUG_SPEC "1.0"
+#endif
+
static const char default_arch[] = DEFAULT_ARCH;
static const char *default_arch_with_ext = DEFAULT_RISCV_ARCH_WITH_EXT;
static enum riscv_spec_class default_isa_spec = ISA_SPEC_CLASS_NONE;
static enum riscv_spec_class default_priv_spec = PRIV_SPEC_CLASS_NONE;
+static enum riscv_spec_class default_debug_spec = DEBUG_SPEC_CLASS_NONE;
static unsigned xlen = 0; /* The width of an x-register. */
static unsigned abi_xlen = 0; /* The width of a pointer in the ABI. */
@@ -258,6 +252,25 @@ riscv_set_default_priv_spec (const char *s)
return 0;
}
+/* Set the default_debug_spec. Return 0 if the spec isn't supported.
+ Otherwise, return 1. */
+
+static int
+riscv_set_default_debug_spec (const char *s)
+{
+ enum riscv_spec_class class = DEBUG_SPEC_CLASS_NONE;
+ RISCV_GET_DEBUG_SPEC_CLASS (s, class);
+ if (class == DEBUG_SPEC_CLASS_NONE)
+ {
+ as_bad ("unknown default debug spec `%s' set by "
+ "-mdebug-spec or --with-debug-spec", s);
+ return 0;
+ }
+ else
+ default_debug_spec = class;
+ return 1;
+}
+
/* This is the set of options which the .option pseudo-op may modify. */
struct riscv_set_options
{
@@ -870,6 +883,7 @@ riscv_csr_address (const char *csr_name,
{
struct riscv_csr_extra *saved_entry = entry;
enum riscv_csr_class csr_class = entry->csr_class;
+ enum riscv_spec_class default_spec = default_priv_spec;
bool need_check_version = true;
bool result = true;
@@ -886,7 +900,7 @@ riscv_csr_address (const char *csr_name,
need_check_version = false;
break;
case CSR_CLASS_DEBUG:
- need_check_version = false;
+ default_spec = default_debug_spec;
break;
default:
as_bad (_("internal: bad RISC-V CSR class (0x%x)"), csr_class);
@@ -898,8 +912,8 @@ riscv_csr_address (const char *csr_name,
while (entry != NULL)
{
if (!need_check_version
- || (default_priv_spec >= entry->define_version
- && default_priv_spec < entry->abort_version))
+ || (default_spec >= entry->define_version
+ && default_spec < entry->abort_version))
{
/* Find the CSR according to the specific version. */
return entry->address;
@@ -907,15 +921,23 @@ riscv_csr_address (const char *csr_name,
entry = entry->next;
}
- /* Can not find the CSR address from the chosen privileged version,
+ /* Can not find the CSR address from the chosen spec version,
so use the newly defined value. */
if (riscv_opts.csr_check)
{
- const char *priv_name = NULL;
- RISCV_GET_PRIV_SPEC_NAME (priv_name, default_priv_spec);
- if (priv_name != NULL)
- as_warn (_("invalid CSR `%s' for the privileged spec `%s'"),
- csr_name, priv_name);
+ const char *spec_name = NULL;
+ if (csr_class == CSR_CLASS_DEBUG)
+ {
+ RISCV_GET_DEBUG_SPEC_NAME (spec_name, default_spec);
+ as_warn (_("invalid CSR `%s' for the debug spec `%s'"),
+ csr_name, spec_name);
+ }
+ else
+ {
+ RISCV_GET_PRIV_SPEC_NAME (spec_name, default_spec);
+ as_warn (_("invalid CSR `%s' for the privileged spec `%s'"),
+ csr_name, spec_name);
+ }
}
return saved_entry->address;
@@ -2812,6 +2834,7 @@ enum options
OPTION_NO_CSR_CHECK,
OPTION_MISA_SPEC,
OPTION_MPRIV_SPEC,
+ OPTION_MDEBUG_SPEC,
OPTION_BIG_ENDIAN,
OPTION_LITTLE_ENDIAN,
OPTION_END_OF_ENUM
@@ -2832,6 +2855,7 @@ struct option md_longopts[] =
{"mno-csr-check", no_argument, NULL, OPTION_NO_CSR_CHECK},
{"misa-spec", required_argument, NULL, OPTION_MISA_SPEC},
{"mpriv-spec", required_argument, NULL, OPTION_MPRIV_SPEC},
+ {"mdebug-spec", required_argument, NULL, OPTION_MDEBUG_SPEC},
{"mbig-endian", no_argument, NULL, OPTION_BIG_ENDIAN},
{"mlittle-endian", no_argument, NULL, OPTION_LITTLE_ENDIAN},
@@ -2851,7 +2875,6 @@ md_parse_option (int c, const char *arg)
case OPTION_NO_PIC:
riscv_opts.pic = false;
break;
-
case OPTION_PIC:
riscv_opts.pic = true;
break;
@@ -2883,7 +2906,6 @@ md_parse_option (int c, const char *arg)
case OPTION_RELAX:
riscv_opts.relax = true;
break;
-
case OPTION_NO_RELAX:
riscv_opts.relax = false;
break;
@@ -2891,7 +2913,6 @@ md_parse_option (int c, const char *arg)
case OPTION_ARCH_ATTR:
riscv_opts.arch_attr = true;
break;
-
case OPTION_NO_ARCH_ATTR:
riscv_opts.arch_attr = false;
break;
@@ -2899,21 +2920,20 @@ md_parse_option (int c, const char *arg)
case OPTION_CSR_CHECK:
riscv_opts.csr_check = true;
break;
-
case OPTION_NO_CSR_CHECK:
riscv_opts.csr_check = false;
break;
case OPTION_MISA_SPEC:
return riscv_set_default_isa_spec (arg);
-
case OPTION_MPRIV_SPEC:
return riscv_set_default_priv_spec (arg);
+ case OPTION_MDEBUG_SPEC:
+ return riscv_set_default_debug_spec (arg);
case OPTION_BIG_ENDIAN:
target_big_endian = 1;
break;
-
case OPTION_LITTLE_ENDIAN:
target_big_endian = 0;
break;
@@ -2950,6 +2970,8 @@ riscv_after_parse_args (void)
riscv_set_default_isa_spec (DEFAULT_RISCV_ISA_SPEC);
if (default_priv_spec == PRIV_SPEC_CLASS_NONE)
riscv_set_default_priv_spec (DEFAULT_RISCV_PRIV_SPEC);
+ if (default_debug_spec == DEBUG_SPEC_CLASS_NONE)
+ riscv_set_default_debug_spec (DEFAULT_RISCV_DEBUG_SPEC);
riscv_set_arch (default_arch_with_ext);
@@ -3642,7 +3664,8 @@ RISC-V options:\n\
-fno-pic don't generate position-independent code (default)\n\
-march=ISA set the RISC-V architecture\n\
-misa-spec=ISAspec set the RISC-V ISA spec (2.2, 20190608, 20191213)\n\
- -mpriv-spec=PRIVspec set the RISC-V privilege spec (1.9, 1.9.1, 1.10, 1.11)\n\
+ -mpriv-spec=PRIVspec set the RISC-V privilege spec (1.9.1, 1.10, 1.11)\n\
+ -mdebug-spec=DEBUGspec set the RISC-V debug spec (0.13, 0.14, 1.0)\n\
-mabi=ABI set the RISC-V ABI\n\
-mrelax enable relax (default)\n\
-mno-relax disable relax\n\
diff --git a/gas/configure b/gas/configure
index 7a528fd485e..a3ab7a18151 100755
--- a/gas/configure
+++ b/gas/configure
@@ -12416,7 +12416,7 @@ _ACEOF
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_isa_spec" >&5
$as_echo "$with_isa_spec" >&6; }
- # --with-priv-spec=[1.9|1.9.1|1.10|1.11].
+ # --with-priv-spec=[1.9.1|1.10|1.11].
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-priv-spec" >&5
$as_echo_n "checking for default configuration of --with-priv-spec... " >&6; }
if test "x${with_priv_spec}" != x; then
@@ -12428,6 +12428,19 @@ _ACEOF
fi
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_priv_spec" >&5
$as_echo "$with_priv_spec" >&6; }
+
+ # --with-debug-spec=[0.13|1.0].
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-debug-spec" >&5
+$as_echo_n "checking for default configuration of --with-debug-spec... " >&6; }
+ if test "x${with_debug_spec}" != x; then
+
+cat >>confdefs.h <<_ACEOF
+#define DEFAULT_RISCV_DEBUG_SPEC "$with_debug_spec"
+_ACEOF
+
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_debug_spec" >&5
+$as_echo "$with_debug_spec" >&6; }
;;
rl78)
diff --git a/gas/configure.ac b/gas/configure.ac
index e2374268c56..39079517210 100644
--- a/gas/configure.ac
+++ b/gas/configure.ac
@@ -603,13 +603,21 @@ changequote([,])dnl
fi
AC_MSG_RESULT($with_isa_spec)
- # --with-priv-spec=[1.9|1.9.1|1.10|1.11].
+ # --with-priv-spec=[1.9.1|1.10|1.11].
AC_MSG_CHECKING(for default configuration of --with-priv-spec)
if test "x${with_priv_spec}" != x; then
AC_DEFINE_UNQUOTED(DEFAULT_RISCV_PRIV_SPEC, "$with_priv_spec",
[Define default value for RISC-V -mpriv-spec])
fi
AC_MSG_RESULT($with_priv_spec)
+
+ # --with-debug-spec=[0.13|1.0].
+ AC_MSG_CHECKING(for default configuration of --with-debug-spec)
+ if test "x${with_debug_spec}" != x; then
+ AC_DEFINE_UNQUOTED(DEFAULT_RISCV_DEBUG_SPEC, "$with_debug_spec",
+ [Define default value for RISC-V -mdebug-spec])
+ fi
+ AC_MSG_RESULT($with_debug_spec)
;;
rl78)
diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi
index c15297e1bea..fa9d98ad847 100644
--- a/gas/doc/c-riscv.texi
+++ b/gas/doc/c-riscv.texi
@@ -51,6 +51,7 @@ Select the default isa spec version. If the version of ISA isn't set
by -march, then assembler helps to set the version according to
the default chosen spec. If this option isn't set, then assembler will
check the default configure setting --with-isa-spec=ISAspec.
+The supported ISAspec: 2.0, 20190608 and 20191213.
@cindex @samp{-mpriv-spec=PRIVspec} option, RISC-V
@item -mpriv-spec=PRIVspec
@@ -58,6 +59,14 @@ Select the privileged spec version. We can decide whether the CSR is valid or
not according to the chosen spec. If this option and the privilege attributes
aren't set, then assembler will check the default configure setting
--with-priv-spec=PRIVspec.
+The supported PRIVspec: 1.9.1, 1.10 and 1.1.
+
+@cindex @samp{-mdebug-spec=DEBUGspec} option, RISC-V
+@item -mdebug-spec=DEBUGspec
+Select the debug spec version. If this option and the privilege attributes
+aren't set, then assembler will check the default configure setting
+--with-debug-spec=DEBUGspec.
+The supported DEBUGspec: 0.13, 0.14, 1.0.
@cindex @samp{-mabi=ABI} option, RISC-V
@item -mabi=ABI
diff --git a/gas/testsuite/gas/riscv/csr-debug-fail-version-0p13.d b/gas/testsuite/gas/riscv/csr-debug-fail-version-0p13.d
new file mode 100644
index 00000000000..87d0002e9a6
--- /dev/null
+++ b/gas/testsuite/gas/riscv/csr-debug-fail-version-0p13.d
@@ -0,0 +1,3 @@
+#as: -march=rv32i -mcsr-check -mdebug-spec=0.13
+#source: csr-debug.s
+#warning_output: csr-debug-fail-version-0p13.l
diff --git a/gas/testsuite/gas/riscv/csr-debug-fail-version-0p13.l b/gas/testsuite/gas/riscv/csr-debug-fail-version-0p13.l
new file mode 100644
index 00000000000..54c4d04372f
--- /dev/null
+++ b/gas/testsuite/gas/riscv/csr-debug-fail-version-0p13.l
@@ -0,0 +1,5 @@
+.*Assembler messages:
+.*Warning: invalid CSR `hcontext' for the debug spec `0.13'
+.*Warning: invalid CSR `mscontext' for the debug spec `0.13'
+.*Warning: invalid CSR `mcontrol6' for the debug spec `0.13'
+.*Warning: invalid CSR `tmexttrigger' for the debug spec `0.13'
diff --git a/gas/testsuite/gas/riscv/csr-debug-version-0p13.d b/gas/testsuite/gas/riscv/csr-debug-version-0p13.d
new file mode 100644
index 00000000000..138b1380148
--- /dev/null
+++ b/gas/testsuite/gas/riscv/csr-debug-version-0p13.d
@@ -0,0 +1,32 @@
+#as: -march=rv32i -mdebug-spec=0.13
+#source: csr-debug.s
+#objdump: -dr -Mdebug-spec=0.13
+
+.*:[ ]+file format .*
+
+
+Disassembly of section .text:
+
+0+000 <.text>:
+[ ]+[0-9a-f]+:[ ]+7b002573[ ]+csrr[ ]+a0,dcsr
+[ ]+[0-9a-f]+:[ ]+7b102573[ ]+csrr[ ]+a0,dpc
+[ ]+[0-9a-f]+:[ ]+7b202573[ ]+csrr[ ]+a0,dscratch0
+[ ]+[0-9a-f]+:[ ]+7b302573[ ]+csrr[ ]+a0,dscratch1
+[ ]+[0-9a-f]+:[ ]+7a002573[ ]+csrr[ ]+a0,tselect
+[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
+[ ]+[0-9a-f]+:[ ]+7a202573[ ]+csrr[ ]+a0,tdata2
+[ ]+[0-9a-f]+:[ ]+7a302573[ ]+csrr[ ]+a0,tdata3
+[ ]+[0-9a-f]+:[ ]+7a402573[ ]+csrr[ ]+a0,tinfo
+[ ]+[0-9a-f]+:[ ]+7a502573[ ]+csrr[ ]+a0,tcontrol
+[ ]+[0-9a-f]+:[ ]+7a802573[ ]+csrr[ ]+a0,mcontext
+[ ]+[0-9a-f]+:[ ]+7aa02573[ ]+csrr[ ]+a0,scontext
+[ ]+[0-9a-f]+:[ ]+6a802573[ ]+csrr[ ]+a0,0x6a8
+[ ]+[0-9a-f]+:[ ]+7aa02573[ ]+csrr[ ]+a0,scontext
+[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
+[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
+[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
+[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
+[ ]+[0-9a-f]+:[ ]+7a302573[ ]+csrr[ ]+a0,tdata3
+[ ]+[0-9a-f]+:[ ]+7a302573[ ]+csrr[ ]+a0,tdata3
+[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
+[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
diff --git a/gas/testsuite/gas/riscv/csr-debug-version-1p0.d b/gas/testsuite/gas/riscv/csr-debug-version-1p0.d
new file mode 100644
index 00000000000..f258a41969b
--- /dev/null
+++ b/gas/testsuite/gas/riscv/csr-debug-version-1p0.d
@@ -0,0 +1,32 @@
+#as: -march=rv32i -mdebug-spec=1.0
+#source: csr-debug.s
+#objdump: -dr -Mdebug-spec=1.0
+
+.*:[ ]+file format .*
+
+
+Disassembly of section .text:
+
+0+000 <.text>:
+[ ]+[0-9a-f]+:[ ]+7b002573[ ]+csrr[ ]+a0,dcsr
+[ ]+[0-9a-f]+:[ ]+7b102573[ ]+csrr[ ]+a0,dpc
+[ ]+[0-9a-f]+:[ ]+7b202573[ ]+csrr[ ]+a0,dscratch0
+[ ]+[0-9a-f]+:[ ]+7b302573[ ]+csrr[ ]+a0,dscratch1
+[ ]+[0-9a-f]+:[ ]+7a002573[ ]+csrr[ ]+a0,tselect
+[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
+[ ]+[0-9a-f]+:[ ]+7a202573[ ]+csrr[ ]+a0,tdata2
+[ ]+[0-9a-f]+:[ ]+7a302573[ ]+csrr[ ]+a0,tdata3
+[ ]+[0-9a-f]+:[ ]+7a402573[ ]+csrr[ ]+a0,tinfo
+[ ]+[0-9a-f]+:[ ]+7a502573[ ]+csrr[ ]+a0,tcontrol
+[ ]+[0-9a-f]+:[ ]+7a802573[ ]+csrr[ ]+a0,mcontext
+[ ]+[0-9a-f]+:[ ]+5a802573[ ]+csrr[ ]+a0,scontext
+[ ]+[0-9a-f]+:[ ]+6a802573[ ]+csrr[ ]+a0,hcontext
+[ ]+[0-9a-f]+:[ ]+7aa02573[ ]+csrr[ ]+a0,mscontext
+[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
+[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
+[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
+[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
+[ ]+[0-9a-f]+:[ ]+7a302573[ ]+csrr[ ]+a0,tdata3
+[ ]+[0-9a-f]+:[ ]+7a302573[ ]+csrr[ ]+a0,tdata3
+[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
+[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
diff --git a/gas/testsuite/gas/riscv/csr-debug.s b/gas/testsuite/gas/riscv/csr-debug.s
new file mode 100644
index 00000000000..4ea06d8cabb
--- /dev/null
+++ b/gas/testsuite/gas/riscv/csr-debug.s
@@ -0,0 +1,29 @@
+ .macro csr val
+ csrr a0,\val
+ .endm
+
+ # Core debug
+ csr dcsr
+ csr dpc
+ csr dscratch0
+ csr dscratch1
+
+ # Trigger debug
+ csr tselect
+ csr tdata1
+ csr tdata2
+ csr tdata3
+ csr tinfo
+ csr tcontrol
+ csr mcontext
+ csr scontext # 0x7aa in 0.13, but changed to 0x5a8 since 1.0
+ csr hcontext # Added in 1.0
+ csr mscontext # Added in 1.0
+ csr mcontrol # 0x7a1, alias to tdata1
+ csr icount # 0x7a1, alias to tdata1
+ csr itrigger # 0x7a1, alias to tdata1
+ csr etrigger # 0x7a1, alias to tdata1
+ csr textra32 # 0x7a3, alias to tdata3
+ csr textra64 # 0x7a3, alias to tdata3
+ csr mcontrol6 # 0x7a1, alias to tdata1
+ csr tmexttrigger # 0x7a1, alias to tdata1
diff --git a/gas/testsuite/gas/riscv/csr-dw-regnums.d b/gas/testsuite/gas/riscv/csr-dw-regnums.d
index de17ad81fbd..48e5e179e3f 100644
--- a/gas/testsuite/gas/riscv/csr-dw-regnums.d
+++ b/gas/testsuite/gas/riscv/csr-dw-regnums.d
@@ -247,9 +247,6 @@ Contents of the .* section:
DW_CFA_offset_extended_sf: r4997 \(mdbound\) at cfa\+3604
DW_CFA_offset_extended_sf: r4897 \(mscounteren\) at cfa\+3204
DW_CFA_offset_extended_sf: r4898 \(mhcounteren\) at cfa\+3208
- DW_CFA_offset_extended_sf: r4097 \(fflags\) at cfa\+4
- DW_CFA_offset_extended_sf: r4098 \(frm\) at cfa\+8
- DW_CFA_offset_extended_sf: r4099 \(fcsr\) at cfa\+12
DW_CFA_offset_extended_sf: r6064 \(dcsr\) at cfa\+7872
DW_CFA_offset_extended_sf: r6065 \(dpc\) at cfa\+7876
DW_CFA_offset_extended_sf: r6066 \(dscratch0\) at cfa\+7880
@@ -261,17 +258,23 @@ Contents of the .* section:
DW_CFA_offset_extended_sf: r6052 \(tinfo\) at cfa\+7824
DW_CFA_offset_extended_sf: r6053 \(tcontrol\) at cfa\+7828
DW_CFA_offset_extended_sf: r6056 \(mcontext\) at cfa\+7840
- DW_CFA_offset_extended_sf: r6058 \(scontext\) at cfa\+7848
+ DW_CFA_offset_extended_sf: r5544 \(scontext\) at cfa\+5792
+ DW_CFA_offset_extended_sf: r5800 \(hcontext\) at cfa\+6816
+ DW_CFA_offset_extended_sf: r6058 \(mscontext\) at cfa\+7848
+ DW_CFA_offset_extended_sf: r4097 \(fflags\) at cfa\+4
+ DW_CFA_offset_extended_sf: r4098 \(frm\) at cfa\+8
+ DW_CFA_offset_extended_sf: r4099 \(fcsr\) at cfa\+12
DW_CFA_offset_extended_sf: r4163 \(utval\) at cfa\+268
DW_CFA_offset_extended_sf: r4419 \(stval\) at cfa\+1292
DW_CFA_offset_extended_sf: r4480 \(satp\) at cfa\+1536
DW_CFA_offset_extended_sf: r4931 \(mtval\) at cfa\+3340
DW_CFA_offset_extended_sf: r4896 \(mcountinhibit\) at cfa\+3200
- DW_CFA_offset_extended_sf: r6066 \(dscratch0\) at cfa\+7880
DW_CFA_offset_extended_sf: r6049 \(tdata1\) at cfa\+7812
DW_CFA_offset_extended_sf: r6049 \(tdata1\) at cfa\+7812
DW_CFA_offset_extended_sf: r6049 \(tdata1\) at cfa\+7812
DW_CFA_offset_extended_sf: r6049 \(tdata1\) at cfa\+7812
DW_CFA_offset_extended_sf: r6051 \(tdata3\) at cfa\+7820
DW_CFA_offset_extended_sf: r6051 \(tdata3\) at cfa\+7820
+ DW_CFA_offset_extended_sf: r6049 \(tdata1\) at cfa\+7812
+ DW_CFA_offset_extended_sf: r6049 \(tdata1\) at cfa\+7812
#...
diff --git a/gas/testsuite/gas/riscv/csr-dw-regnums.s b/gas/testsuite/gas/riscv/csr-dw-regnums.s
index ecc80146976..0cdfa38816a 100644
--- a/gas/testsuite/gas/riscv/csr-dw-regnums.s
+++ b/gas/testsuite/gas/riscv/csr-dw-regnums.s
@@ -238,10 +238,7 @@ _start:
.cfi_offset mdbound, 3604
.cfi_offset mscounteren, 3204
.cfi_offset mhcounteren, 3208
- # unprivileged
- .cfi_offset fflags, 4
- .cfi_offset frm, 8
- .cfi_offset fcsr, 12
+ # debug
.cfi_offset dcsr, 7872
.cfi_offset dpc, 7876
.cfi_offset dscratch0, 7880
@@ -253,19 +250,26 @@ _start:
.cfi_offset tinfo, 7824
.cfi_offset tcontrol, 7828
.cfi_offset mcontext, 7840
- .cfi_offset scontext, 7848
+ .cfi_offset scontext, 5792
+ .cfi_offset hcontext, 6816
+ .cfi_offset mscontext, 7848
+ # unprivileged
+ .cfi_offset fflags, 4
+ .cfi_offset frm, 8
+ .cfi_offset fcsr, 12
# aliases
.cfi_offset ubadaddr, 268
.cfi_offset sbadaddr, 1292
.cfi_offset sptbr, 1536
.cfi_offset mbadaddr, 3340
.cfi_offset mucounteren, 3200
- .cfi_offset dscratch, 7880
.cfi_offset mcontrol, 7812
.cfi_offset icount, 7812
.cfi_offset itrigger, 7812
.cfi_offset etrigger, 7812
.cfi_offset textra32, 7820
.cfi_offset textra64, 7820
+ .cfi_offset mcontrol6, 7812
+ .cfi_offset tmexttrigger, 7812
nop
.cfi_endproc
diff --git a/gas/testsuite/gas/riscv/csr-priv-fail-fext.d b/gas/testsuite/gas/riscv/csr-priv-fail-fext.d
new file mode 100644
index 00000000000..d4a4a728112
--- /dev/null
+++ b/gas/testsuite/gas/riscv/csr-priv-fail-fext.d
@@ -0,0 +1,3 @@
+#as: -march=rv32i -mcsr-check
+#source: csr-priv.s
+#warning_output: csr-priv-fail-fext.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-fext.l b/gas/testsuite/gas/riscv/csr-priv-fail-fext.l
similarity index 100%
rename from gas/testsuite/gas/riscv/priv-reg-fail-fext.l
rename to gas/testsuite/gas/riscv/csr-priv-fail-fext.l
diff --git a/gas/testsuite/gas/riscv/csr-priv-fail-nonexistent.d b/gas/testsuite/gas/riscv/csr-priv-fail-nonexistent.d
new file mode 100644
index 00000000000..ad7ba2dfc25
--- /dev/null
+++ b/gas/testsuite/gas/riscv/csr-priv-fail-nonexistent.d
@@ -0,0 +1,3 @@
+#as:
+#source: csr-priv-fail-nonexistent.s
+#error_output: csr-priv-fail-nonexistent.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-nonexistent.l b/gas/testsuite/gas/riscv/csr-priv-fail-nonexistent.l
similarity index 100%
rename from gas/testsuite/gas/riscv/priv-reg-fail-nonexistent.l
rename to gas/testsuite/gas/riscv/csr-priv-fail-nonexistent.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-nonexistent.s b/gas/testsuite/gas/riscv/csr-priv-fail-nonexistent.s
similarity index 100%
rename from gas/testsuite/gas/riscv/priv-reg-fail-nonexistent.s
rename to gas/testsuite/gas/riscv/csr-priv-fail-nonexistent.s
diff --git a/gas/testsuite/gas/riscv/csr-priv-fail-read-only-01.d b/gas/testsuite/gas/riscv/csr-priv-fail-read-only-01.d
new file mode 100644
index 00000000000..58e34674281
--- /dev/null
+++ b/gas/testsuite/gas/riscv/csr-priv-fail-read-only-01.d
@@ -0,0 +1,3 @@
+#as: -march=rv32if -mcsr-check
+#source: csr-priv-fail-read-only-01.s
+#warning_output: csr-priv-fail-read-only-01.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l b/gas/testsuite/gas/riscv/csr-priv-fail-read-only-01.l
similarity index 100%
rename from gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l
rename to gas/testsuite/gas/riscv/csr-priv-fail-read-only-01.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.s b/gas/testsuite/gas/riscv/csr-priv-fail-read-only-01.s
similarity index 98%
rename from gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.s
rename to gas/testsuite/gas/riscv/csr-priv-fail-read-only-01.s
index af0fc4e14a4..61dec6d8c98 100644
--- a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.s
+++ b/gas/testsuite/gas/riscv/csr-priv-fail-read-only-01.s
@@ -247,7 +247,6 @@
csr sptbr # 0x180 in 1.9.1, but the value is satp since 1.10
csr mbadaddr # 0x343 in 1.9.1, but the value is mtval since 1.10
csr mucounteren # 0x320 in 1.9.1, dropped in 1.10, but the value is mcountinhibit since 1.11
- csr dscratch # 0x7b2 in 1.10, but the value is dscratch0 since 1.11
csr hstatus # 0x200, dropped in 1.10
csr hedeleg # 0x202, dropped in 1.10
diff --git a/gas/testsuite/gas/riscv/csr-priv-fail-read-only-02.d b/gas/testsuite/gas/riscv/csr-priv-fail-read-only-02.d
new file mode 100644
index 00000000000..8dfcce42aac
--- /dev/null
+++ b/gas/testsuite/gas/riscv/csr-priv-fail-read-only-02.d
@@ -0,0 +1,3 @@
+#as: -march=rv32if -mcsr-check -mpriv-spec=1.11
+#source: csr-priv-fail-read-only-02.s
+#warning_output: csr-priv-fail-read-only-02.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-02.l b/gas/testsuite/gas/riscv/csr-priv-fail-read-only-02.l
similarity index 100%
rename from gas/testsuite/gas/riscv/priv-reg-fail-read-only-02.l
rename to gas/testsuite/gas/riscv/csr-priv-fail-read-only-02.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-02.s b/gas/testsuite/gas/riscv/csr-priv-fail-read-only-02.s
similarity index 100%
rename from gas/testsuite/gas/riscv/priv-reg-fail-read-only-02.s
rename to gas/testsuite/gas/riscv/csr-priv-fail-read-only-02.s
diff --git a/gas/testsuite/gas/riscv/csr-priv-fail-rv32-only.d b/gas/testsuite/gas/riscv/csr-priv-fail-rv32-only.d
new file mode 100644
index 00000000000..f0e82d48158
--- /dev/null
+++ b/gas/testsuite/gas/riscv/csr-priv-fail-rv32-only.d
@@ -0,0 +1,3 @@
+#as: -march=rv64if -mcsr-check
+#source: csr-priv.s
+#warning_output: csr-priv-fail-rv32-only.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l b/gas/testsuite/gas/riscv/csr-priv-fail-rv32-only.l
similarity index 100%
rename from gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l
rename to gas/testsuite/gas/riscv/csr-priv-fail-rv32-only.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d b/gas/testsuite/gas/riscv/csr-priv-fail-version-1p10.d
similarity index 76%
rename from gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d
rename to gas/testsuite/gas/riscv/csr-priv-fail-version-1p10.d
index 07cf05a9c29..57ae80f1b7d 100644
--- a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d
+++ b/gas/testsuite/gas/riscv/csr-priv-fail-version-1p10.d
@@ -1,6 +1,6 @@
#as: -march=rv32if -mcsr-check -mpriv-spec=1.10 -march-attr
-#source: priv-reg.s
-#warning_output: priv-reg-fail-version-1p10.l
+#source: csr-priv.s
+#warning_output: csr-priv-fail-version-1p10.l
#readelf: -A
Attribute Section: riscv
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l b/gas/testsuite/gas/riscv/csr-priv-fail-version-1p10.l
similarity index 100%
rename from gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l
rename to gas/testsuite/gas/riscv/csr-priv-fail-version-1p10.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d b/gas/testsuite/gas/riscv/csr-priv-fail-version-1p11.d
similarity index 76%
rename from gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d
rename to gas/testsuite/gas/riscv/csr-priv-fail-version-1p11.d
index bf4b1db3ed6..e8395bdb43a 100644
--- a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d
+++ b/gas/testsuite/gas/riscv/csr-priv-fail-version-1p11.d
@@ -1,6 +1,6 @@
#as: -march=rv32if -mcsr-check -mpriv-spec=1.11 -march-attr
-#source: priv-reg.s
-#warning_output: priv-reg-fail-version-1p11.l
+#source: csr-priv.s
+#warning_output: csr-priv-fail-version-1p11.l
#readelf: -A
Attribute Section: riscv
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l b/gas/testsuite/gas/riscv/csr-priv-fail-version-1p11.l
similarity index 100%
rename from gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l
rename to gas/testsuite/gas/riscv/csr-priv-fail-version-1p11.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d b/gas/testsuite/gas/riscv/csr-priv-fail-version-1p9p1.d
similarity index 78%
rename from gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d
rename to gas/testsuite/gas/riscv/csr-priv-fail-version-1p9p1.d
index e2c33d81dc8..e245793efcf 100644
--- a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d
+++ b/gas/testsuite/gas/riscv/csr-priv-fail-version-1p9p1.d
@@ -1,6 +1,6 @@
#as: -march=rv32if -mcsr-check -mpriv-spec=1.9.1 -march-attr
-#source: priv-reg.s
-#warning_output: priv-reg-fail-version-1p9p1.l
+#source: csr-priv.s
+#warning_output: csr-priv-fail-version-1p9p1.l
#readelf: -A
Attribute Section: riscv
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l b/gas/testsuite/gas/riscv/csr-priv-fail-version-1p9p1.l
similarity index 100%
rename from gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l
rename to gas/testsuite/gas/riscv/csr-priv-fail-version-1p9p1.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-pseudo-noalias.d b/gas/testsuite/gas/riscv/csr-priv-pseudo-noalias.d
similarity index 98%
rename from gas/testsuite/gas/riscv/priv-reg-pseudo-noalias.d
rename to gas/testsuite/gas/riscv/csr-priv-pseudo-noalias.d
index e0acb182a22..b78b8e7ae18 100644
--- a/gas/testsuite/gas/riscv/priv-reg-pseudo-noalias.d
+++ b/gas/testsuite/gas/riscv/csr-priv-pseudo-noalias.d
@@ -1,4 +1,4 @@
-#source: priv-reg-pseudo.s
+#source: csr-priv-pseudo.s
#as: -march=rv32if
#objdump: -dr -Mno-aliases
diff --git a/gas/testsuite/gas/riscv/priv-reg-pseudo.d b/gas/testsuite/gas/riscv/csr-priv-pseudo.d
similarity index 98%
rename from gas/testsuite/gas/riscv/priv-reg-pseudo.d
rename to gas/testsuite/gas/riscv/csr-priv-pseudo.d
index 424351009f1..22e6f2d4390 100644
--- a/gas/testsuite/gas/riscv/priv-reg-pseudo.d
+++ b/gas/testsuite/gas/riscv/csr-priv-pseudo.d
@@ -1,4 +1,4 @@
-#source: priv-reg-pseudo.s
+#source: csr-priv-pseudo.s
#as: -march=rv32if
#objdump: -dr
diff --git a/gas/testsuite/gas/riscv/priv-reg-pseudo.s b/gas/testsuite/gas/riscv/csr-priv-pseudo.s
similarity index 100%
rename from gas/testsuite/gas/riscv/priv-reg-pseudo.s
rename to gas/testsuite/gas/riscv/csr-priv-pseudo.s
diff --git a/gas/testsuite/gas/riscv/priv-reg-version-1p10.d b/gas/testsuite/gas/riscv/csr-priv-version-1p10.d
similarity index 92%
rename from gas/testsuite/gas/riscv/priv-reg-version-1p10.d
rename to gas/testsuite/gas/riscv/csr-priv-version-1p10.d
index 3ad8eebe851..1e8a3a4f2a5 100644
--- a/gas/testsuite/gas/riscv/priv-reg-version-1p10.d
+++ b/gas/testsuite/gas/riscv/csr-priv-version-1p10.d
@@ -1,5 +1,5 @@
#as: -march=rv32if -mpriv-spec=1.10
-#source: priv-reg.s
+#source: csr-priv.s
#objdump: -dr -Mpriv-spec=1.10
.*:[ ]+file format .*
@@ -246,22 +246,3 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+00102573[ ]+frflags[ ]+a0
[ ]+[0-9a-f]+:[ ]+00202573[ ]+frrm[ ]+a0
[ ]+[0-9a-f]+:[ ]+00302573[ ]+frcsr[ ]+a0
-[ ]+[0-9a-f]+:[ ]+7b002573[ ]+csrr[ ]+a0,dcsr
-[ ]+[0-9a-f]+:[ ]+7b102573[ ]+csrr[ ]+a0,dpc
-[ ]+[0-9a-f]+:[ ]+7b202573[ ]+csrr[ ]+a0,dscratch0
-[ ]+[0-9a-f]+:[ ]+7b302573[ ]+csrr[ ]+a0,dscratch1
-[ ]+[0-9a-f]+:[ ]+7b202573[ ]+csrr[ ]+a0,dscratch0
-[ ]+[0-9a-f]+:[ ]+7a002573[ ]+csrr[ ]+a0,tselect
-[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
-[ ]+[0-9a-f]+:[ ]+7a202573[ ]+csrr[ ]+a0,tdata2
-[ ]+[0-9a-f]+:[ ]+7a302573[ ]+csrr[ ]+a0,tdata3
-[ ]+[0-9a-f]+:[ ]+7a402573[ ]+csrr[ ]+a0,tinfo
-[ ]+[0-9a-f]+:[ ]+7a502573[ ]+csrr[ ]+a0,tcontrol
-[ ]+[0-9a-f]+:[ ]+7a802573[ ]+csrr[ ]+a0,mcontext
-[ ]+[0-9a-f]+:[ ]+7aa02573[ ]+csrr[ ]+a0,scontext
-[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
-[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
-[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
-[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
-[ ]+[0-9a-f]+:[ ]+7a302573[ ]+csrr[ ]+a0,tdata3
-[ ]+[0-9a-f]+:[ ]+7a302573[ ]+csrr[ ]+a0,tdata3
diff --git a/gas/testsuite/gas/riscv/priv-reg-version-1p11.d b/gas/testsuite/gas/riscv/csr-priv-version-1p11.d
similarity index 92%
rename from gas/testsuite/gas/riscv/priv-reg-version-1p11.d
rename to gas/testsuite/gas/riscv/csr-priv-version-1p11.d
index 5824bc5e1f6..324a7442b89 100644
--- a/gas/testsuite/gas/riscv/priv-reg-version-1p11.d
+++ b/gas/testsuite/gas/riscv/csr-priv-version-1p11.d
@@ -1,5 +1,5 @@
#as: -march=rv32if -mpriv-spec=1.11
-#source: priv-reg.s
+#source: csr-priv.s
#objdump: -dr -Mpriv-spec=1.11
.*:[ ]+file format .*
@@ -246,22 +246,3 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+00102573[ ]+frflags[ ]+a0
[ ]+[0-9a-f]+:[ ]+00202573[ ]+frrm[ ]+a0
[ ]+[0-9a-f]+:[ ]+00302573[ ]+frcsr[ ]+a0
-[ ]+[0-9a-f]+:[ ]+7b002573[ ]+csrr[ ]+a0,dcsr
-[ ]+[0-9a-f]+:[ ]+7b102573[ ]+csrr[ ]+a0,dpc
-[ ]+[0-9a-f]+:[ ]+7b202573[ ]+csrr[ ]+a0,dscratch0
-[ ]+[0-9a-f]+:[ ]+7b302573[ ]+csrr[ ]+a0,dscratch1
-[ ]+[0-9a-f]+:[ ]+7b202573[ ]+csrr[ ]+a0,dscratch0
-[ ]+[0-9a-f]+:[ ]+7a002573[ ]+csrr[ ]+a0,tselect
-[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
-[ ]+[0-9a-f]+:[ ]+7a202573[ ]+csrr[ ]+a0,tdata2
-[ ]+[0-9a-f]+:[ ]+7a302573[ ]+csrr[ ]+a0,tdata3
-[ ]+[0-9a-f]+:[ ]+7a402573[ ]+csrr[ ]+a0,tinfo
-[ ]+[0-9a-f]+:[ ]+7a502573[ ]+csrr[ ]+a0,tcontrol
-[ ]+[0-9a-f]+:[ ]+7a802573[ ]+csrr[ ]+a0,mcontext
-[ ]+[0-9a-f]+:[ ]+7aa02573[ ]+csrr[ ]+a0,scontext
-[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
-[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
-[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
-[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
-[ ]+[0-9a-f]+:[ ]+7a302573[ ]+csrr[ ]+a0,tdata3
-[ ]+[0-9a-f]+:[ ]+7a302573[ ]+csrr[ ]+a0,tdata3
diff --git a/gas/testsuite/gas/riscv/priv-reg-version-1p9p1.d b/gas/testsuite/gas/riscv/csr-priv-version-1p9p1.d
similarity index 92%
rename from gas/testsuite/gas/riscv/priv-reg-version-1p9p1.d
rename to gas/testsuite/gas/riscv/csr-priv-version-1p9p1.d
index 569b9587e29..d20d827faaa 100644
--- a/gas/testsuite/gas/riscv/priv-reg-version-1p9p1.d
+++ b/gas/testsuite/gas/riscv/csr-priv-version-1p9p1.d
@@ -1,5 +1,5 @@
#as: -march=rv32if -mpriv-spec=1.9.1
-#source: priv-reg.s
+#source: csr-priv.s
#objdump: -dr -Mpriv-spec=1.9.1
.*:[ ]+file format .*
@@ -246,22 +246,3 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+00102573[ ]+frflags[ ]+a0
[ ]+[0-9a-f]+:[ ]+00202573[ ]+frrm[ ]+a0
[ ]+[0-9a-f]+:[ ]+00302573[ ]+frcsr[ ]+a0
-[ ]+[0-9a-f]+:[ ]+7b002573[ ]+csrr[ ]+a0,dcsr
-[ ]+[0-9a-f]+:[ ]+7b102573[ ]+csrr[ ]+a0,dpc
-[ ]+[0-9a-f]+:[ ]+7b202573[ ]+csrr[ ]+a0,dscratch0
-[ ]+[0-9a-f]+:[ ]+7b302573[ ]+csrr[ ]+a0,dscratch1
-[ ]+[0-9a-f]+:[ ]+7b202573[ ]+csrr[ ]+a0,dscratch0
-[ ]+[0-9a-f]+:[ ]+7a002573[ ]+csrr[ ]+a0,tselect
-[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
-[ ]+[0-9a-f]+:[ ]+7a202573[ ]+csrr[ ]+a0,tdata2
-[ ]+[0-9a-f]+:[ ]+7a302573[ ]+csrr[ ]+a0,tdata3
-[ ]+[0-9a-f]+:[ ]+7a402573[ ]+csrr[ ]+a0,tinfo
-[ ]+[0-9a-f]+:[ ]+7a502573[ ]+csrr[ ]+a0,tcontrol
-[ ]+[0-9a-f]+:[ ]+7a802573[ ]+csrr[ ]+a0,mcontext
-[ ]+[0-9a-f]+:[ ]+7aa02573[ ]+csrr[ ]+a0,scontext
-[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
-[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
-[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
-[ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1
-[ ]+[0-9a-f]+:[ ]+7a302573[ ]+csrr[ ]+a0,tdata3
-[ ]+[0-9a-f]+:[ ]+7a302573[ ]+csrr[ ]+a0,tdata3
diff --git a/gas/testsuite/gas/riscv/priv-reg.s b/gas/testsuite/gas/riscv/csr-priv.s
similarity index 91%
rename from gas/testsuite/gas/riscv/priv-reg.s
rename to gas/testsuite/gas/riscv/csr-priv.s
index c40d28862b7..149ee5acfea 100644
--- a/gas/testsuite/gas/riscv/priv-reg.s
+++ b/gas/testsuite/gas/riscv/csr-priv.s
@@ -259,26 +259,3 @@
csr fflags
csr frm
csr fcsr
-
- # Core debug
- csr dcsr
- csr dpc
- csr dscratch0
- csr dscratch1
- csr dscratch # 0x7b2, alias to dscratch0
-
- # Trigger debug
- csr tselect
- csr tdata1
- csr tdata2
- csr tdata3
- csr tinfo
- csr tcontrol
- csr mcontext
- csr scontext
- csr mcontrol # 0x7a1, alias to tdata1
- csr icount # 0x7a1, alias to tdata1
- csr itrigger # 0x7a1, alias to tdata1
- csr etrigger # 0x7a1, alias to tdata1
- csr textra32 # 0x7a3, alias to tdata3
- csr textra64 # 0x7a3, alias to tdata3
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-fext.d b/gas/testsuite/gas/riscv/priv-reg-fail-fext.d
deleted file mode 100644
index da535663693..00000000000
--- a/gas/testsuite/gas/riscv/priv-reg-fail-fext.d
+++ /dev/null
@@ -1,3 +0,0 @@
-#as: -march=rv32i -mcsr-check
-#source: priv-reg.s
-#warning_output: priv-reg-fail-fext.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-nonexistent.d b/gas/testsuite/gas/riscv/priv-reg-fail-nonexistent.d
deleted file mode 100644
index 9bb3f826538..00000000000
--- a/gas/testsuite/gas/riscv/priv-reg-fail-nonexistent.d
+++ /dev/null
@@ -1,3 +0,0 @@
-#as:
-#source: priv-reg-fail-nonexistent.s
-#error_output: priv-reg-fail-nonexistent.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d b/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d
deleted file mode 100644
index ae190c053c6..00000000000
--- a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d
+++ /dev/null
@@ -1,3 +0,0 @@
-#as: -march=rv32if -mcsr-check
-#source: priv-reg-fail-read-only-01.s
-#warning_output: priv-reg-fail-read-only-01.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-02.d b/gas/testsuite/gas/riscv/priv-reg-fail-read-only-02.d
deleted file mode 100644
index ec206e4d6d1..00000000000
--- a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-02.d
+++ /dev/null
@@ -1,3 +0,0 @@
-#as: -march=rv32if -mcsr-check -mpriv-spec=1.11
-#source: priv-reg-fail-read-only-02.s
-#warning_output: priv-reg-fail-read-only-02.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d b/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d
deleted file mode 100644
index d71b2615c5f..00000000000
--- a/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d
+++ /dev/null
@@ -1,3 +0,0 @@
-#as: -march=rv64if -mcsr-check
-#source: priv-reg.s
-#warning_output: priv-reg-fail-rv32-only.l
diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
index 9999da6241a..8a3e698e24c 100644
--- a/include/opcode/riscv-opc.h
+++ b/include/opcode/riscv-opc.h
@@ -852,10 +852,7 @@
#define CSR_MDBOUND 0x385
#define CSR_MSCOUNTEREN 0x321
#define CSR_MHCOUNTEREN 0x322
-/* Unprivileged CSR addresses. */
-#define CSR_FFLAGS 0x1
-#define CSR_FRM 0x2
-#define CSR_FCSR 0x3
+/* Debug CSR addresses. */
#define CSR_DCSR 0x7b0
#define CSR_DPC 0x7b1
#define CSR_DSCRATCH0 0x7b2
@@ -867,7 +864,13 @@
#define CSR_TINFO 0x7a4
#define CSR_TCONTROL 0x7a5
#define CSR_MCONTEXT 0x7a8
-#define CSR_SCONTEXT 0x7aa
+#define CSR_SCONTEXT 0x5a8
+#define CSR_HCONTEXT 0x6a8
+#define CSR_MSCONTEXT 0x7aa
+/* Unprivileged CSR addresses. */
+#define CSR_FFLAGS 0x1
+#define CSR_FRM 0x2
+#define CSR_FCSR 0x3
#endif /* RISCV_ENCODING_H */
#ifdef DECLARE_INSN
DECLARE_INSN(slli_rv32, MATCH_SLLI_RV32, MASK_SLLI_RV32)
@@ -1377,6 +1380,21 @@ DECLARE_CSR(mhpmevent28, CSR_MHPMEVENT28, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PR
DECLARE_CSR(mhpmevent29, CSR_MHPMEVENT29, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_DRAFT)
DECLARE_CSR(mhpmevent30, CSR_MHPMEVENT30, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_DRAFT)
DECLARE_CSR(mhpmevent31, CSR_MHPMEVENT31, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_DRAFT)
+/* Debug CSRs. */
+DECLARE_CSR(dcsr, CSR_DCSR, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_0P13, DEBUG_SPEC_CLASS_DRAFT)
+DECLARE_CSR(dpc, CSR_DPC, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_0P13, DEBUG_SPEC_CLASS_DRAFT)
+DECLARE_CSR(dscratch0, CSR_DSCRATCH0, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_0P13, DEBUG_SPEC_CLASS_DRAFT)
+DECLARE_CSR(dscratch1, CSR_DSCRATCH1, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_0P13, DEBUG_SPEC_CLASS_DRAFT)
+DECLARE_CSR(tselect, CSR_TSELECT, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_0P13, DEBUG_SPEC_CLASS_DRAFT)
+DECLARE_CSR(tdata1, CSR_TDATA1, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_0P13, DEBUG_SPEC_CLASS_DRAFT)
+DECLARE_CSR(tdata2, CSR_TDATA2, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_0P13, DEBUG_SPEC_CLASS_DRAFT)
+DECLARE_CSR(tdata3, CSR_TDATA3, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_0P13, DEBUG_SPEC_CLASS_DRAFT)
+DECLARE_CSR(tinfo, CSR_TINFO, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_0P13, DEBUG_SPEC_CLASS_DRAFT)
+DECLARE_CSR(tcontrol, CSR_TCONTROL, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_0P13, DEBUG_SPEC_CLASS_DRAFT)
+DECLARE_CSR(mcontext, CSR_MCONTEXT, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_0P13, DEBUG_SPEC_CLASS_DRAFT)
+DECLARE_CSR(scontext, CSR_SCONTEXT, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_1P0, DEBUG_SPEC_CLASS_DRAFT)
+DECLARE_CSR(hcontext, CSR_HCONTEXT, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_1P0, DEBUG_SPEC_CLASS_DRAFT)
+DECLARE_CSR(mscontext, CSR_MSCONTEXT, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_1P0, DEBUG_SPEC_CLASS_DRAFT)
/* Dropped CSRs. */
DECLARE_CSR(hstatus, CSR_HSTATUS, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
DECLARE_CSR(hedeleg, CSR_HEDELEG, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
@@ -1400,18 +1418,6 @@ DECLARE_CSR(mhcounteren, CSR_MHCOUNTEREN, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PR
DECLARE_CSR(fflags, CSR_FFLAGS, CSR_CLASS_F, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(frm, CSR_FRM, CSR_CLASS_F, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(fcsr, CSR_FCSR, CSR_CLASS_F, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
-DECLARE_CSR(dcsr, CSR_DCSR, CSR_CLASS_DEBUG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
-DECLARE_CSR(dpc, CSR_DPC, CSR_CLASS_DEBUG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
-DECLARE_CSR(dscratch0, CSR_DSCRATCH0, CSR_CLASS_DEBUG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
-DECLARE_CSR(dscratch1, CSR_DSCRATCH1, CSR_CLASS_DEBUG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
-DECLARE_CSR(tselect, CSR_TSELECT, CSR_CLASS_DEBUG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
-DECLARE_CSR(tdata1, CSR_TDATA1, CSR_CLASS_DEBUG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
-DECLARE_CSR(tdata2, CSR_TDATA2, CSR_CLASS_DEBUG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
-DECLARE_CSR(tdata3, CSR_TDATA3, CSR_CLASS_DEBUG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
-DECLARE_CSR(tinfo, CSR_TINFO, CSR_CLASS_DEBUG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
-DECLARE_CSR(tcontrol, CSR_TCONTROL, CSR_CLASS_DEBUG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
-DECLARE_CSR(mcontext, CSR_MCONTEXT, CSR_CLASS_DEBUG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
-DECLARE_CSR(scontext, CSR_SCONTEXT, CSR_CLASS_DEBUG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
#endif /* DECLARE_CSR */
#ifdef DECLARE_CSR_ALIAS
DECLARE_CSR_ALIAS(ubadaddr, CSR_UTVAL, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
@@ -1419,11 +1425,13 @@ DECLARE_CSR_ALIAS(sbadaddr, CSR_STVAL, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_
DECLARE_CSR_ALIAS(sptbr, CSR_SATP, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
DECLARE_CSR_ALIAS(mbadaddr, CSR_MTVAL, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
DECLARE_CSR_ALIAS(mucounteren, CSR_MCOUNTINHIBIT, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
-DECLARE_CSR_ALIAS(dscratch, CSR_DSCRATCH0, CSR_CLASS_DEBUG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
-DECLARE_CSR_ALIAS(mcontrol, CSR_TDATA1, CSR_CLASS_DEBUG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
-DECLARE_CSR_ALIAS(icount, CSR_TDATA1, CSR_CLASS_DEBUG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
-DECLARE_CSR_ALIAS(itrigger, CSR_TDATA1, CSR_CLASS_DEBUG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
-DECLARE_CSR_ALIAS(etrigger, CSR_TDATA1, CSR_CLASS_DEBUG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
-DECLARE_CSR_ALIAS(textra32, CSR_TDATA3, CSR_CLASS_DEBUG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
-DECLARE_CSR_ALIAS(textra64, CSR_TDATA3, CSR_CLASS_DEBUG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR_ALIAS(mcontrol, CSR_TDATA1, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_0P13, DEBUG_SPEC_CLASS_DRAFT)
+DECLARE_CSR_ALIAS(icount, CSR_TDATA1, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_0P13, DEBUG_SPEC_CLASS_DRAFT)
+DECLARE_CSR_ALIAS(itrigger, CSR_TDATA1, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_0P13, DEBUG_SPEC_CLASS_DRAFT)
+DECLARE_CSR_ALIAS(etrigger, CSR_TDATA1, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_0P13, DEBUG_SPEC_CLASS_DRAFT)
+DECLARE_CSR_ALIAS(textra32, CSR_TDATA3, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_0P13, DEBUG_SPEC_CLASS_DRAFT)
+DECLARE_CSR_ALIAS(textra64, CSR_TDATA3, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_0P13, DEBUG_SPEC_CLASS_DRAFT)
+DECLARE_CSR_ALIAS(scontext, CSR_MSCONTEXT, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_0P13, DEBUG_SPEC_CLASS_1P0)
+DECLARE_CSR_ALIAS(mcontrol6, CSR_TDATA1, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_1P0, DEBUG_SPEC_CLASS_DRAFT)
+DECLARE_CSR_ALIAS(tmexttrigger, CSR_TDATA1, CSR_CLASS_DEBUG, DEBUG_SPEC_CLASS_1P0, DEBUG_SPEC_CLASS_DRAFT)
#endif /* DECLARE_CSR_ALIAS */
diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
index fdf3df4f5c1..e1bc430091c 100644
--- a/include/opcode/riscv.h
+++ b/include/opcode/riscv.h
@@ -299,6 +299,17 @@ static const char * const riscv_pred_succ[16] =
/* The maximal number of subset can be required. */
#define MAX_SUBSET_NUM 4
+/* All RISC-V CSR belong to one of these classes. */
+enum riscv_csr_class
+{
+ CSR_CLASS_NONE,
+
+ CSR_CLASS_I,
+ CSR_CLASS_I_32, /* rv32 only */
+ CSR_CLASS_F, /* f-ext only */
+ CSR_CLASS_DEBUG /* debug CSR */
+};
+
/* All RISC-V instructions belong to at least one of these classes. */
enum riscv_insn_class
{
@@ -425,7 +436,6 @@ enum
M_NUM_MACROS
};
-
extern const char * const riscv_gpr_names_numeric[NGPR];
extern const char * const riscv_gpr_names_abi[NGPR];
extern const char * const riscv_fpr_names_numeric[NFPR];
diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index fe8dfb88d90..6178edf28b8 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -33,6 +33,7 @@
#include <ctype.h>
static enum riscv_spec_class default_priv_spec = PRIV_SPEC_CLASS_NONE;
+static enum riscv_spec_class default_debug_spec = DEBUG_SPEC_CLASS_NONE;
struct riscv_private_data
{
@@ -116,6 +117,17 @@ parse_riscv_dis_option (const char *option)
option, value, name);
}
}
+ else if (strcmp (option, "debug-spec") == 0)
+ {
+ enum riscv_spec_class debug_spec = DEBUG_SPEC_CLASS_NONE;
+
+ RISCV_GET_DEBUG_SPEC_CLASS (value, debug_spec);
+ if (debug_spec == DEBUG_SPEC_CLASS_NONE)
+ opcodes_error_handler (_("unknown debug spec set by %s=%s"),
+ option, value);
+ else
+ default_debug_spec = debug_spec;
+ }
else
{
/* xgettext:c-format */
@@ -383,16 +395,21 @@ print_insn_args (const char *d, insn_t l, bfd_vma pc, disassemble_info *info)
for (i = 0; i < 4096; i++)
riscv_csr_hash[i] = NULL;
- /* Set to the newest privileged version. */
+ /* Set to the newest spec versions. */
if (default_priv_spec == PRIV_SPEC_CLASS_NONE)
default_priv_spec = PRIV_SPEC_CLASS_DRAFT - 1;
+ if (default_debug_spec == DEBUG_SPEC_CLASS_NONE)
+ default_debug_spec = DEBUG_SPEC_CLASS_DRAFT - 1;
#define DECLARE_CSR(name, num, class, define_version, abort_version) \
if (riscv_csr_hash[num] == NULL \
&& ((define_version == PRIV_SPEC_CLASS_NONE \
&& abort_version == PRIV_SPEC_CLASS_NONE) \
|| (default_priv_spec >= define_version \
- && default_priv_spec < abort_version))) \
+ && default_priv_spec < abort_version) \
+ || (class == CSR_CLASS_DEBUG \
+ && default_debug_spec >= define_version \
+ && default_debug_spec < abort_version))) \
riscv_csr_hash[num] = #name;
#define DECLARE_CSR_ALIAS(name, num, class, define_version, abort_version) \
DECLARE_CSR (name, num, class, define_version, abort_version)
--
2.30.2
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