PR27684, PowerPC missing mfsprg0 and others
Jan Beulich
jbeulich@suse.com
Thu Apr 8 06:05:02 GMT 2021
On 08.04.2021 01:02, Alan Modra via Binutils wrote:
> PR 27684
> * ppc-opc.c (powerpc_opcodes): Correct usprg typos, add mfpir.
I'm just curious: This description matches the code changes, but
only covers the "and others" in the title. Is the title merely
missing a 'u', or is there some further code change missing?
Jan
> diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
> index 025a2ba2fba..272dc098991 100644
> --- a/opcodes/ppc-opc.c
> +++ b/opcodes/ppc-opc.c
> @@ -6975,8 +6975,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
> {"mfivor15", XSPR(31,339,415), XSPR_MASK, BOOKE, 0, {RT}},
> {"mftir", XSPR(31,339,446), XSPR_MASK, POWER10, 0, {RS}},
> {"mfptcr", XSPR(31,339,464), XSPR_MASK, POWER10, 0, {RS}},
> -{"mfuspgr0", XSPR(31,339,496), XSPR_MASK, POWER10, 0, {RS}},
> -{"mfuspgr1", XSPR(31,339,497), XSPR_MASK, POWER10, 0, {RS}},
> +{"mfusprg0", XSPR(31,339,496), XSPR_MASK, POWER10, 0, {RS}},
> +{"mfusprg1", XSPR(31,339,497), XSPR_MASK, POWER10, 0, {RS}},
> {"mfurmor", XSPR(31,339,505), XSPR_MASK, POWER10, 0, {RS}},
> {"mfusrr0", XSPR(31,339,506), XSPR_MASK, POWER10, 0, {RS}},
> {"mfusrr1", XSPR(31,339,507), XSPR_MASK, POWER10, 0, {RS}},
> @@ -7147,6 +7147,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
> {"mfthrm2", XSPR(31,339,1021), XSPR_MASK, PPC750, 0, {RT}},
> {"mfpbl2", XSPR(31,339,1022), XSPR_MASK, PPC403, 0, {RT}},
> {"mfthrm3", XSPR(31,339,1022), XSPR_MASK, PPC750, 0, {RT}},
> +{"mfpir", XSPR(31,339,1023), XSPR_MASK, POWER10, 0, {RT}},
> {"mfpbu2", XSPR(31,339,1023), XSPR_MASK, PPC403, 0, {RT}},
> {"mfspr", X(31,339), X_MASK, COM, 0, {RT, SPR}},
>
> @@ -7444,8 +7445,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
> {"mtivor14", XSPR(31,467,414), XSPR_MASK, BOOKE, 0, {RS}},
> {"mtivor15", XSPR(31,467,415), XSPR_MASK, BOOKE, 0, {RS}},
> {"mtptcr", XSPR(31,467,464), XSPR_MASK, POWER10, 0, {RS}},
> -{"mtuspgr0", XSPR(31,467,496), XSPR_MASK, POWER10, 0, {RS}},
> -{"mtuspgr1", XSPR(31,467,497), XSPR_MASK, POWER10, 0, {RS}},
> +{"mtusprg0", XSPR(31,467,496), XSPR_MASK, POWER10, 0, {RS}},
> +{"mtusprg1", XSPR(31,467,497), XSPR_MASK, POWER10, 0, {RS}},
> {"mturmor", XSPR(31,467,505), XSPR_MASK, POWER10, 0, {RS}},
> {"mtusrr0", XSPR(31,467,506), XSPR_MASK, POWER10, 0, {RS}},
> {"mtusrr1", XSPR(31,467,507), XSPR_MASK, POWER10, 0, {RS}},
>
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