x86: Support Intel AVX VNNI
Cui, Lili
lili.cui@intel.com
Mon Oct 26 01:54:49 GMT 2020
> > >> Hence faod: I think the change here is wrong and should either not
> > >> be committed or reverted. (Oddly enough there have been no Intel
> > >> syntax checks of any prefix uses at all - I would otherwise have
> > >> outright nak-ed the change.)
> > >
> > > We can change disassembler output from {vex3} to {vex} and put back
> > > the {vex3| tests in AVX VNNI.
> >
> > Good, thanks.
> >
>
> Lili, please prepare a patch.
Here is the patch, keep assembler input {vex3} tests and change the output, thanks.
[PATCH] Change avxvnni disassembler output from {vex3} to {vex}
gas/
* testsuite/gas/i386/avx-vnni.d: Change psuedo prefix from
{vex3} to {vex}
* testsuite/gas/i386/x86-64-avx-vnni.d: Likewise.
opcodes/
* i386-dis.c: Change "XV" to print "{vex}" pseudo prefix.
---
gas/testsuite/gas/i386/avx-vnni.d | 32 ++++++++++++------------
gas/testsuite/gas/i386/x86-64-avx-vnni.d | 32 ++++++++++++------------
opcodes/i386-dis.c | 1 -
3 files changed, 32 insertions(+), 33 deletions(-)
diff --git a/gas/testsuite/gas/i386/avx-vnni.d b/gas/testsuite/gas/i386/avx-vnni.d
index 6e31528cf2..7d20c80973 100644
--- a/gas/testsuite/gas/i386/avx-vnni.d
+++ b/gas/testsuite/gas/i386/avx-vnni.d
@@ -9,27 +9,27 @@ Disassembly of section .text:
0+ <_start>:
+[a-f0-9]+: 62 f2 5d 08 50 d2 vpdpbusd %xmm2,%xmm4,%xmm2
+[a-f0-9]+: 62 f2 5d 08 50 d2 vpdpbusd %xmm2,%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 50 d2 \{vex3\} vpdpbusd %xmm2,%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 50 d2 \{vex3\} vpdpbusd %xmm2,%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 50 11 \{vex3\} vpdpbusd \(%ecx\),%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 50 11 \{vex3\} vpdpbusd \(%ecx\),%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 50 d2 \{vex\} vpdpbusd %xmm2,%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 50 d2 \{vex\} vpdpbusd %xmm2,%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 50 11 \{vex\} vpdpbusd \(%ecx\),%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 50 11 \{vex\} vpdpbusd \(%ecx\),%xmm4,%xmm2
+[a-f0-9]+: 62 f2 5d 08 52 d2 vpdpwssd %xmm2,%xmm4,%xmm2
+[a-f0-9]+: 62 f2 5d 08 52 d2 vpdpwssd %xmm2,%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 52 d2 \{vex3\} vpdpwssd %xmm2,%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 52 d2 \{vex3\} vpdpwssd %xmm2,%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 52 11 \{vex3\} vpdpwssd \(%ecx\),%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 52 11 \{vex3\} vpdpwssd \(%ecx\),%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 52 d2 \{vex\} vpdpwssd %xmm2,%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 52 d2 \{vex\} vpdpwssd %xmm2,%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 52 11 \{vex\} vpdpwssd \(%ecx\),%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 52 11 \{vex\} vpdpwssd \(%ecx\),%xmm4,%xmm2
+[a-f0-9]+: 62 f2 5d 08 51 d2 vpdpbusds %xmm2,%xmm4,%xmm2
+[a-f0-9]+: 62 f2 5d 08 51 d2 vpdpbusds %xmm2,%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 51 d2 \{vex3\} vpdpbusds %xmm2,%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 51 d2 \{vex3\} vpdpbusds %xmm2,%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 51 11 \{vex3\} vpdpbusds \(%ecx\),%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 51 11 \{vex3\} vpdpbusds \(%ecx\),%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 51 d2 \{vex\} vpdpbusds %xmm2,%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 51 d2 \{vex\} vpdpbusds %xmm2,%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 51 11 \{vex\} vpdpbusds \(%ecx\),%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 51 11 \{vex\} vpdpbusds \(%ecx\),%xmm4,%xmm2
+[a-f0-9]+: 62 f2 5d 08 53 d2 vpdpwssds %xmm2,%xmm4,%xmm2
+[a-f0-9]+: 62 f2 5d 08 53 d2 vpdpwssds %xmm2,%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 53 d2 \{vex3\} vpdpwssds %xmm2,%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 53 d2 \{vex3\} vpdpwssds %xmm2,%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 53 11 \{vex3\} vpdpwssds \(%ecx\),%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 53 11 \{vex3\} vpdpwssds \(%ecx\),%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 53 d2 \{vex\} vpdpwssds %xmm2,%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 53 d2 \{vex\} vpdpwssds %xmm2,%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 53 11 \{vex\} vpdpwssds \(%ecx\),%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 53 11 \{vex\} vpdpwssds \(%ecx\),%xmm4,%xmm2
+[a-f0-9]+: 62 f2 5d 08 50 d2 vpdpbusd %xmm2,%xmm4,%xmm2
#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx-vnni.d b/gas/testsuite/gas/i386/x86-64-avx-vnni.d
index c4474739ed..6b3acab5d5 100644
--- a/gas/testsuite/gas/i386/x86-64-avx-vnni.d
+++ b/gas/testsuite/gas/i386/x86-64-avx-vnni.d
@@ -9,31 +9,31 @@ Disassembly of section .text:
0+ <_start>:
+[a-f0-9]+: 62 d2 5d 08 50 d4 vpdpbusd %xmm12,%xmm4,%xmm2
+[a-f0-9]+: 62 d2 5d 08 50 d4 vpdpbusd %xmm12,%xmm4,%xmm2
- +[a-f0-9]+: c4 c2 59 50 d4 \{vex3\} vpdpbusd %xmm12,%xmm4,%xmm2
- +[a-f0-9]+: c4 c2 59 50 d4 \{vex3\} vpdpbusd %xmm12,%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 50 11 \{vex3\} vpdpbusd \(%rcx\),%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 50 11 \{vex3\} vpdpbusd \(%rcx\),%xmm4,%xmm2
+ +[a-f0-9]+: c4 c2 59 50 d4 \{vex\} vpdpbusd %xmm12,%xmm4,%xmm2
+ +[a-f0-9]+: c4 c2 59 50 d4 \{vex\} vpdpbusd %xmm12,%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 50 11 \{vex\} vpdpbusd \(%rcx\),%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 50 11 \{vex\} vpdpbusd \(%rcx\),%xmm4,%xmm2
+[a-f0-9]+: 62 b2 5d 08 50 d6 vpdpbusd %xmm22,%xmm4,%xmm2
+[a-f0-9]+: 62 d2 5d 08 52 d4 vpdpwssd %xmm12,%xmm4,%xmm2
+[a-f0-9]+: 62 d2 5d 08 52 d4 vpdpwssd %xmm12,%xmm4,%xmm2
- +[a-f0-9]+: c4 c2 59 52 d4 \{vex3\} vpdpwssd %xmm12,%xmm4,%xmm2
- +[a-f0-9]+: c4 c2 59 52 d4 \{vex3\} vpdpwssd %xmm12,%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 52 11 \{vex3\} vpdpwssd \(%rcx\),%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 52 11 \{vex3\} vpdpwssd \(%rcx\),%xmm4,%xmm2
+ +[a-f0-9]+: c4 c2 59 52 d4 \{vex\} vpdpwssd %xmm12,%xmm4,%xmm2
+ +[a-f0-9]+: c4 c2 59 52 d4 \{vex\} vpdpwssd %xmm12,%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 52 11 \{vex\} vpdpwssd \(%rcx\),%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 52 11 \{vex\} vpdpwssd \(%rcx\),%xmm4,%xmm2
+[a-f0-9]+: 62 b2 5d 08 52 d6 vpdpwssd %xmm22,%xmm4,%xmm2
+[a-f0-9]+: 62 d2 5d 08 51 d4 vpdpbusds %xmm12,%xmm4,%xmm2
+[a-f0-9]+: 62 d2 5d 08 51 d4 vpdpbusds %xmm12,%xmm4,%xmm2
- +[a-f0-9]+: c4 c2 59 51 d4 \{vex3\} vpdpbusds %xmm12,%xmm4,%xmm2
- +[a-f0-9]+: c4 c2 59 51 d4 \{vex3\} vpdpbusds %xmm12,%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 51 11 \{vex3\} vpdpbusds \(%rcx\),%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 51 11 \{vex3\} vpdpbusds \(%rcx\),%xmm4,%xmm2
+ +[a-f0-9]+: c4 c2 59 51 d4 \{vex\} vpdpbusds %xmm12,%xmm4,%xmm2
+ +[a-f0-9]+: c4 c2 59 51 d4 \{vex\} vpdpbusds %xmm12,%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 51 11 \{vex\} vpdpbusds \(%rcx\),%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 51 11 \{vex\} vpdpbusds \(%rcx\),%xmm4,%xmm2
+[a-f0-9]+: 62 b2 5d 08 51 d6 vpdpbusds %xmm22,%xmm4,%xmm2
+[a-f0-9]+: 62 d2 5d 08 53 d4 vpdpwssds %xmm12,%xmm4,%xmm2
+[a-f0-9]+: 62 d2 5d 08 53 d4 vpdpwssds %xmm12,%xmm4,%xmm2
- +[a-f0-9]+: c4 c2 59 53 d4 \{vex3\} vpdpwssds %xmm12,%xmm4,%xmm2
- +[a-f0-9]+: c4 c2 59 53 d4 \{vex3\} vpdpwssds %xmm12,%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 53 11 \{vex3\} vpdpwssds \(%rcx\),%xmm4,%xmm2
- +[a-f0-9]+: c4 e2 59 53 11 \{vex3\} vpdpwssds \(%rcx\),%xmm4,%xmm2
+ +[a-f0-9]+: c4 c2 59 53 d4 \{vex\} vpdpwssds %xmm12,%xmm4,%xmm2
+ +[a-f0-9]+: c4 c2 59 53 d4 \{vex\} vpdpwssds %xmm12,%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 53 11 \{vex\} vpdpwssds \(%rcx\),%xmm4,%xmm2
+ +[a-f0-9]+: c4 e2 59 53 11 \{vex\} vpdpwssds \(%rcx\),%xmm4,%xmm2
+[a-f0-9]+: 62 b2 5d 08 53 d6 vpdpwssds %xmm22,%xmm4,%xmm2
+[a-f0-9]+: 62 d2 5d 08 50 d4 vpdpbusd %xmm12,%xmm4,%xmm2
#pass
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 068858b1e7..9338b1f375 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -11091,7 +11091,6 @@ putop (const char *in_template, int sizeflag)
*obufp++ = 'v';
*obufp++ = 'e';
*obufp++ = 'x';
- *obufp++ = '3';
*obufp++ = '}';
}
else if (rex & REX_W)
--
2.17.1
Thanks,
Lili.
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