[PATCH] RISC-V: Update ABI to the elf_flags after parsing elf attributes.
Nelson Chu
nelson.chu@sifive.com
Tue Oct 20 03:39:42 GMT 2020
Originally, if the -mabi option isn't set, then assembler will set the
abi according to the architecture string in the riscv_after_parse_args.
But we should also check and reset the abi later since the architecture
string may be reset by the elf attributes. Therefore, set the abi to
the elf_flags in the riscv_after_parse_args seems too early, we can set
them in the riscv_elf_final_processing to make sure that the architecture
string won't be changed.
For the rv32i-elf toolchain, this patch can fix the mis-matched ABI errors
for Run pr26391-5 and Run pr26391-6 testcases. Besides, it also correct
the elf header flags of the output objects. Consider the new testcases,
mabi-fail-02 and mabi-noabi-attr-[01|02|03], they are failed before applying
this patch.
The rv[32|64]-[elf|linux] toolchain regression pass for this patch.
gas/
* config/tc-riscv.c (explicit_mabi): New boolean to indicate if
the -mabi= option is explictly set.
(md_parse_option): Set explicit_mabi to TRUE if -mabi is set.
(riscv_set_abi_by_arch): New function. If the -mabi option isn't
set, then we set the abi according to the architecture string.
Otherwise, check if there are conflicts between architecture
and abi setting.
(riscv_after_parse_args): Move the abi setting to
riscv_elf_final_processing.
(riscv_elf_final_processing): Call the riscv_set_abi_by_arch.
* testsuite/gas/riscv/mabi-attr-01.s: New testcase.
* testsuite/gas/riscv/mabi-attr-02.s: Likewise.
* testsuite/gas/riscv/mabi-attr-03.s: Likewise.
* testsuite/gas/riscv/mabi-fail-01.d: Likewise.
* testsuite/gas/riscv/mabi-fail-01.l: Likewise.
* testsuite/gas/riscv/mabi-fail-02.d: Likewise.
* testsuite/gas/riscv/mabi-fail-02.l: Likewise.
* testsuite/gas/riscv/mabi-noabi-attr-01.d: Likewise.
* testsuite/gas/riscv/mabi-noabi-attr-02.d: Likewise.
* testsuite/gas/riscv/mabi-noabi-attr-03.d: Likewise.
* testsuite/gas/riscv/mabi-noabi-march-01.d: Likewise.
* testsuite/gas/riscv/mabi-noabi-march-02.d: Likewise.
* testsuite/gas/riscv/mabi-noabi-march-03.d: Likewise.
---
gas/config/tc-riscv.c | 69 +++++++++++++++------------
gas/testsuite/gas/riscv/mabi-attr-01.s | 1 +
gas/testsuite/gas/riscv/mabi-attr-02.s | 1 +
gas/testsuite/gas/riscv/mabi-attr-03.s | 1 +
gas/testsuite/gas/riscv/mabi-fail-01.d | 3 ++
gas/testsuite/gas/riscv/mabi-fail-01.l | 2 +
gas/testsuite/gas/riscv/mabi-fail-02.d | 3 ++
gas/testsuite/gas/riscv/mabi-fail-02.l | 2 +
gas/testsuite/gas/riscv/mabi-noabi-attr-01.d | 9 ++++
gas/testsuite/gas/riscv/mabi-noabi-attr-02.d | 9 ++++
gas/testsuite/gas/riscv/mabi-noabi-attr-03.d | 9 ++++
gas/testsuite/gas/riscv/mabi-noabi-march-01.d | 9 ++++
gas/testsuite/gas/riscv/mabi-noabi-march-02.d | 9 ++++
gas/testsuite/gas/riscv/mabi-noabi-march-03.d | 9 ++++
14 files changed, 106 insertions(+), 30 deletions(-)
create mode 100644 gas/testsuite/gas/riscv/mabi-attr-01.s
create mode 100644 gas/testsuite/gas/riscv/mabi-attr-02.s
create mode 100644 gas/testsuite/gas/riscv/mabi-attr-03.s
create mode 100644 gas/testsuite/gas/riscv/mabi-fail-01.d
create mode 100644 gas/testsuite/gas/riscv/mabi-fail-01.l
create mode 100644 gas/testsuite/gas/riscv/mabi-fail-02.d
create mode 100644 gas/testsuite/gas/riscv/mabi-fail-02.l
create mode 100644 gas/testsuite/gas/riscv/mabi-noabi-attr-01.d
create mode 100644 gas/testsuite/gas/riscv/mabi-noabi-attr-02.d
create mode 100644 gas/testsuite/gas/riscv/mabi-noabi-attr-03.d
create mode 100644 gas/testsuite/gas/riscv/mabi-noabi-march-01.d
create mode 100644 gas/testsuite/gas/riscv/mabi-noabi-march-02.d
create mode 100644 gas/testsuite/gas/riscv/mabi-noabi-march-03.d
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index 7c22843..6913b1c 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -350,6 +350,9 @@ static bfd_boolean explicit_attr = FALSE;
/* Indicate CSR or priv instructions are explictly used. */
static bfd_boolean explicit_priv_attr = FALSE;
+/* Indicate -mabi= option is explictly set. */
+static bfd_boolean explicit_mabi = FALSE;
+
/* Macros for encoding relaxation state for RVC branches and far jumps. */
#define RELAX_BRANCH_ENCODE(uncond, rvc, length) \
((relax_substateT) \
@@ -2630,6 +2633,39 @@ riscv_set_abi (unsigned new_xlen, enum float_abi new_float_abi, bfd_boolean rve)
rve_abi = rve;
}
+/* If the -mabi option isn't set, then we set the abi according to the arch
+ string. Otherwise, check if there are conflicts between architecture
+ and abi setting. */
+
+static void
+riscv_set_abi_by_arch (void)
+{
+ if (!explicit_mabi)
+ {
+ if (riscv_subset_supports ("q"))
+ riscv_set_abi (xlen, FLOAT_ABI_QUAD, FALSE);
+ else if (riscv_subset_supports ("d"))
+ riscv_set_abi (xlen, FLOAT_ABI_DOUBLE, FALSE);
+ else
+ riscv_set_abi (xlen, FLOAT_ABI_SOFT, FALSE);
+ }
+ else
+ {
+ gas_assert (abi_xlen != 0 && xlen != 0 && float_abi != FLOAT_ABI_DEFAULT);
+ if (abi_xlen > xlen)
+ as_bad ("can't have %d-bit ABI on %d-bit ISA", abi_xlen, xlen);
+ else if (abi_xlen < xlen)
+ as_bad ("%d-bit ABI not yet supported on %d-bit ISA", abi_xlen, xlen);
+ }
+
+ /* Update the EF_RISCV_FLOAT_ABI field of elf_flags. */
+ elf_flags &= ~EF_RISCV_FLOAT_ABI;
+ elf_flags |= float_abi << 1;
+
+ if (rve_abi)
+ elf_flags |= EF_RISCV_RVE;
+}
+
int
md_parse_option (int c, const char *arg)
{
@@ -2670,6 +2706,7 @@ md_parse_option (int c, const char *arg)
riscv_set_abi (64, FLOAT_ABI_QUAD, FALSE);
else
return 0;
+ explicit_mabi = TRUE;
break;
case OPTION_RELAX:
@@ -2754,36 +2791,6 @@ riscv_after_parse_args (void)
if (default_priv_spec == PRIV_SPEC_CLASS_NONE)
riscv_set_default_priv_spec (DEFAULT_RISCV_PRIV_SPEC);
- /* Infer ABI from ISA if not specified on command line. */
- if (abi_xlen == 0)
- abi_xlen = xlen;
- else if (abi_xlen > xlen)
- as_bad ("can't have %d-bit ABI on %d-bit ISA", abi_xlen, xlen);
- else if (abi_xlen < xlen)
- as_bad ("%d-bit ABI not yet supported on %d-bit ISA", abi_xlen, xlen);
-
- if (float_abi == FLOAT_ABI_DEFAULT)
- {
- riscv_subset_t *subset;
-
- /* Assume soft-float unless D extension is present. */
- float_abi = FLOAT_ABI_SOFT;
-
- for (subset = riscv_subsets.head; subset != NULL; subset = subset->next)
- {
- if (strcasecmp (subset->name, "D") == 0)
- float_abi = FLOAT_ABI_DOUBLE;
- if (strcasecmp (subset->name, "Q") == 0)
- float_abi = FLOAT_ABI_QUAD;
- }
- }
-
- if (rve_abi)
- elf_flags |= EF_RISCV_RVE;
-
- /* Insert float_abi into the EF_RISCV_FLOAT_ABI field of elf_flags. */
- elf_flags |= float_abi * (EF_RISCV_FLOAT_ABI & ~(EF_RISCV_FLOAT_ABI << 1));
-
/* If the CIE to be produced has not been overridden on the command line,
then produce version 3 by default. This allows us to use the full
range of registers in a .cfi_return_column directive. */
@@ -3514,6 +3521,8 @@ tc_riscv_regname_to_dw2regnum (char *regname)
void
riscv_elf_final_processing (void)
{
+ riscv_set_abi_by_arch ();
+
elf_elfheader (stdoutput)->e_flags |= elf_flags;
}
diff --git a/gas/testsuite/gas/riscv/mabi-attr-01.s b/gas/testsuite/gas/riscv/mabi-attr-01.s
new file mode 100644
index 0000000..47f3fa5
--- /dev/null
+++ b/gas/testsuite/gas/riscv/mabi-attr-01.s
@@ -0,0 +1 @@
+ .attribute arch,"rv32i"
diff --git a/gas/testsuite/gas/riscv/mabi-attr-02.s b/gas/testsuite/gas/riscv/mabi-attr-02.s
new file mode 100644
index 0000000..4e89eb2
--- /dev/null
+++ b/gas/testsuite/gas/riscv/mabi-attr-02.s
@@ -0,0 +1 @@
+ .attribute arch,"rv32ifd"
diff --git a/gas/testsuite/gas/riscv/mabi-attr-03.s b/gas/testsuite/gas/riscv/mabi-attr-03.s
new file mode 100644
index 0000000..66182db
--- /dev/null
+++ b/gas/testsuite/gas/riscv/mabi-attr-03.s
@@ -0,0 +1 @@
+ .attribute arch,"rv64ifdq"
diff --git a/gas/testsuite/gas/riscv/mabi-fail-01.d b/gas/testsuite/gas/riscv/mabi-fail-01.d
new file mode 100644
index 0000000..7804934
--- /dev/null
+++ b/gas/testsuite/gas/riscv/mabi-fail-01.d
@@ -0,0 +1,3 @@
+#as: -march-attr -mabi=lp64d
+#source: mabi-attr-01.s
+#error_output: mabi-fail-01.l
diff --git a/gas/testsuite/gas/riscv/mabi-fail-01.l b/gas/testsuite/gas/riscv/mabi-fail-01.l
new file mode 100644
index 0000000..65bf0ac
--- /dev/null
+++ b/gas/testsuite/gas/riscv/mabi-fail-01.l
@@ -0,0 +1,2 @@
+.*Assembler messages:
+.*Error: can't have 64-bit ABI on 32-bit ISA
diff --git a/gas/testsuite/gas/riscv/mabi-fail-02.d b/gas/testsuite/gas/riscv/mabi-fail-02.d
new file mode 100644
index 0000000..2d6cfb0
--- /dev/null
+++ b/gas/testsuite/gas/riscv/mabi-fail-02.d
@@ -0,0 +1,3 @@
+#as: -march-attr -mabi=ilp32
+#source: mabi-attr-03.s
+#error_output: mabi-fail-02.l
diff --git a/gas/testsuite/gas/riscv/mabi-fail-02.l b/gas/testsuite/gas/riscv/mabi-fail-02.l
new file mode 100644
index 0000000..8d45a07
--- /dev/null
+++ b/gas/testsuite/gas/riscv/mabi-fail-02.l
@@ -0,0 +1,2 @@
+.*Assembler messages:
+.*Error: 32-bit ABI not yet supported on 64-bit ISA
diff --git a/gas/testsuite/gas/riscv/mabi-noabi-attr-01.d b/gas/testsuite/gas/riscv/mabi-noabi-attr-01.d
new file mode 100644
index 0000000..d7580f7
--- /dev/null
+++ b/gas/testsuite/gas/riscv/mabi-noabi-attr-01.d
@@ -0,0 +1,9 @@
+#as: -march-attr -march=rv64ifd
+#readelf: -h
+#source: mabi-attr-01.s
+ELF Header:
+#...
+[ ]+Class:[ ]+ELF32
+#...
+[ ]+Flags:[ ]+0x0
+#...
diff --git a/gas/testsuite/gas/riscv/mabi-noabi-attr-02.d b/gas/testsuite/gas/riscv/mabi-noabi-attr-02.d
new file mode 100644
index 0000000..83971ef
--- /dev/null
+++ b/gas/testsuite/gas/riscv/mabi-noabi-attr-02.d
@@ -0,0 +1,9 @@
+#as: -march-attr -march=rv64i
+#readelf: -h
+#source: mabi-attr-02.s
+ELF Header:
+#...
+[ ]+Class:[ ]+ELF32
+#...
+[ ]+Flags:[ ]+0x4, double-float ABI
+#...
diff --git a/gas/testsuite/gas/riscv/mabi-noabi-attr-03.d b/gas/testsuite/gas/riscv/mabi-noabi-attr-03.d
new file mode 100644
index 0000000..5b3d460
--- /dev/null
+++ b/gas/testsuite/gas/riscv/mabi-noabi-attr-03.d
@@ -0,0 +1,9 @@
+#as: -march-attr -march=rv32i
+#readelf: -h
+#source: mabi-attr-03.s
+ELF Header:
+#...
+[ ]+Class:[ ]+ELF64
+#...
+[ ]+Flags:[ ]+0x6, quad-float ABI
+#...
diff --git a/gas/testsuite/gas/riscv/mabi-noabi-march-01.d b/gas/testsuite/gas/riscv/mabi-noabi-march-01.d
new file mode 100644
index 0000000..0814cf7
--- /dev/null
+++ b/gas/testsuite/gas/riscv/mabi-noabi-march-01.d
@@ -0,0 +1,9 @@
+#as: -march=rv32i
+#readelf: -h
+#source: empty.s
+ELF Header:
+#...
+[ ]+Class:[ ]+ELF32
+#...
+[ ]+Flags:[ ]+0x0
+#...
diff --git a/gas/testsuite/gas/riscv/mabi-noabi-march-02.d b/gas/testsuite/gas/riscv/mabi-noabi-march-02.d
new file mode 100644
index 0000000..cceaf9d
--- /dev/null
+++ b/gas/testsuite/gas/riscv/mabi-noabi-march-02.d
@@ -0,0 +1,9 @@
+#as: -march=rv32ifd
+#readelf: -h
+#source: empty.s
+ELF Header:
+#...
+[ ]+Class:[ ]+ELF32
+#...
+[ ]+Flags:[ ]+0x4, double-float ABI
+#...
diff --git a/gas/testsuite/gas/riscv/mabi-noabi-march-03.d b/gas/testsuite/gas/riscv/mabi-noabi-march-03.d
new file mode 100644
index 0000000..a1543ef
--- /dev/null
+++ b/gas/testsuite/gas/riscv/mabi-noabi-march-03.d
@@ -0,0 +1,9 @@
+#as: -march=rv64ifdq
+#readelf: -h
+#source: empty.s
+ELF Header:
+#...
+[ ]+Class:[ ]+ELF64
+#...
+[ ]+Flags:[ ]+0x6, quad-float ABI
+#...
--
2.7.4
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