[PATCH] x86: Support GNU_PROPERTY_X86_ISA_1_V[234] marker:
Florian Weimer
fweimer@redhat.com
Wed Oct 7 09:22:13 GMT 2020
* H. J. Lu via Binutils:
> GCC 11 supports -march=x86-64-v[234] to enable x86 micro-architecture ISA
> levels:
>
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97250
>
> Update GNU_PROPERTY_X86_ISA_1_XXX macros:
>
> https://gitlab.com/x86-psABIs/x86-64-ABI/-/merge_requests/13
>
> in x86 ELF binaries to indicate that micro-architecture ISA levels
> required to execute the binary:
>
> #define GNU_PROPERTY_X86_ISA_1_NEEDED (GNU_PROPERTY_X86_UINT32_OR_LO + 2)
> #define GNU_PROPERTY_X86_ISA_1_USED (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 2)
> #define GNU_PROPERTY_X86_ISA_1_V2 (1U << 0)
> #define GNU_PROPERTY_X86_ISA_1_V3 (1U << 1)
> #define GNU_PROPERTY_X86_ISA_1_V4 (1U << 2)
>
> The previous GNU_PROPERTY_X86_ISA_1_XXX macros are deprecated and renamed
> to GNU_PROPERTY_X86_COMPAT_2_ISA_1_XXX.
>
> Also add
>
> #define GNU_PROPERTY_X86_FEATURE_2_MASK (1U << 11)
>
> for mask registers.
I'm not sure if this is the right way to do this. How is the level
markup going to be used?
We might eventually store allocated notes in /etc/ld.so.conf and use
them to select a shared object implementation based on which objects the
dynamic linker sees as matching the requirement. There is still the
matter of choosing between different eligible implementations. Maybe a
simple priority field could help with that. But I don't think it should
replace a requirement to match ISAs.
Thanks,
Florian
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