[PATCH] RISC-V: Relax PCREL to GPREL while doing other relaxations is dangerous.

[Nelson Chu]

On Sat, Nov 21, 2020 at 4:30 AM Jim Wilson <jimw@sifive.com> wrote:
> The R_RISCV_DELETE serves a special purpose.  We normally relax the auipc before the add/ld/jalr/whatever instruction that it is paired with.  The %lo relocation requires access to the address of the auipc to relax it.  But if we delete the auipc instruction before we relax the %lo, then it no longer has an address, and the relaxation of the %lo can fail and produce the wrong result.  So instead of deleting the auipc instruction, we give it a R_RISCV_DELETE reloc.  Then after we have done the %lo relaxations we go back through and process the R_RISCV_DELETE relocs to actually delete the auipc instruction.

Agreed!

> I believe the code already sets again to TRUE every place where we delete or shorten an instruction during relaxation.  We just aren't taking good advantage of this as any R_RISCV_ALIGN reloc processing prevents the next call to _bfd_riscv_relax_section from doing anything.

Agreed!  We already set again in every place we can.

> In case I wasn't clear, I think your patch is fine.  I just think we can make more improvements with a follow on patch.

I'm worried that I might have missed something or misunderstood
something.  However, thanks for your detailed descriptions and
reconfirmation, these are helpful and important to me.  The
R_RISCV_ALIGN suggestion in the previous mail is really great, I will
do that improvement in the later patches.  Hope we can get better code
size reductions with the alignment improvement :P

Thanks
Nelson