[PATCH][GAS] aarch64: Add atomic 64-byte load/store instructions for Armv8.7

[Przemyslaw Wirkus]

Armv8.7 architecture introduces the "accelerator extension", aka
load/store of 64 bytes. New atomic load/store instructions are: LD64B,
ST64B, ST64BV and ST64BV0.

This patch adds:
+ New feature +ls64 to -march command line.
+ New atomic load/store instructions associated with above feature.

For more details regarding atomic 64-byte load/store instruction for
Armv8.7 please refer to Arm A64 Instruction set documentation for
Armv8-A architecture profile, see document page 157 for load
instruction, and pages 414-418 for store instructions of [0].

    [0]: https://developer.arm.com/docs/ddi0596/i

Regression tested and no issues.

OK for master branch ?

gas/ChangeLog:

2020-10-29  Przemyslaw Wirkus  <mailto:przemyslaw.wirkus@arm.com>

	* NEWS: Update docs.
	* config/tc-aarch64.c: Add +ls64 feature to -march flags set.
	* testsuite/gas/aarch64/ls64-invalid.d: New test.
	* testsuite/gas/aarch64/ls64-invalid.l: New test.
	* testsuite/gas/aarch64/ls64-invalid.s: New test.
	* testsuite/gas/aarch64/ls64.s: New test.

include/ChangeLog:

2020-10-29  Przemyslaw Wirkus  <mailto:przemyslaw.wirkus@arm.com>

	* opcode/aarch64.h (AARCH64_FEATURE_LS64): New +ls64 feature flag.
	(AARCH64_ARCH_V8_7): Add LS64 as part of Armv8.7-a.

opcodes/ChangeLog:

2020-10-29  Przemyslaw Wirkus  <mailto:przemyslaw.wirkus@arm.com>

	* aarch64-tbl.h (QL_X2NIL): New qualifier for 64-byte stores.
	(LS64): Handler with +ls64 feature flags.
	(_LS64_INSN): New instruction group macro.
	(struct aarch64_opcode): Add LS64 instructions.
	* aarch64-asm-2.c: Regenerated.
	* aarch64-dis-2.c: Regenerated.
	* aarch64-opc-2.c: Regenerated.

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