PowerPC POWER10 updates to dcbf, sync and wait instructions

[Peter Bergner]

On 5/18/20 3:03 PM, Tulio Magno Quites Machado Filho wrote:
> Peter Bergner via Binutils <binutils@sourceware.org> writes:
>> +{"dcbflp",	XOPL2(31,86,3), XRT_MASK,    POWER9,	PPC476,		{RA0, RB}},
>> +{"dcbfps",	XOPL3(31,86,4), XRT_MASK,    POWER10,   PPC476,		{RA0, RB}},
>> +{"dcbstps",	XOPL3(31,86,6), XRT_MASK,    POWER10,   PPC476,		{RA0, RB}},
>> +{"dcbf",	X(31,86),	XL3RT_MASK,  POWER10,	PPC476,		{RA0, RB, L3OPT}},
>> +{"dcbf",	X(31,86),	XLRT_MASK,   PPC,	POWER10,	{RA0, RB, L2OPT}},
> 
> Power ISA 3.1 states the following (page 1038):
> 
>     The encodings for dcbfps, dcbstps, plwsync, and phwsync were chosen to
>     enable software developed to control updates to persistent storage on
>     processors that comply with Version 3.1 and subsequent versions of the
>     architecture to run compatibly on the POWER9 processor.
> 
> So, I think these instructions should be available on POWER9 too.
[snip]
> Likewise here.
> Power ISA 3.1, page 1087, figure 5 better describes how they're executed on
> earlier processors.

I don't think this is saying we should enable the new mnemonics on POWER9,
but rather if one of these is assembled for POWER10, that they'll run on
POWER9 just fine.  Ditto for the sync insns.

Alan or Bill,

How do you read those paragraphs?

Peter