PowerPC POWER10 updates to dcbf, sync and wait instructions

[Alan Modra]

On Sat, May 16, 2020 at 05:53:20PM -0500, Peter Bergner wrote:
> -/* The 2-bit L field in a SYNC or WC field in a WAIT instruction.
> +/* The 2-bit/3-bit L or 2-bit WC field in a SYNC, DCBF or WAIT instruction.
>     For SYNC, some L values are reserved:
> -     * Value 3 is reserved on newer server cpus.
> -     * Values 2 and 3 are reserved on all other cpus.  */
> +     * Values 3, 6 and 7 are reserved on all cpus.
> +     * Value 2 is reserved on all other cpus.

The above needs fixing.

> +      /* For SYNC, some L values are illegal.  */
> +      mask = (dialect & PPC_OPCODE_POWER10) ?  0x7 : 0x3;
> +
> +      /* If the value is within range, check for other illegal values.  */
> +      if ((value & mask) == value)
> +	switch (value)
> +	  {
> +	  case 2:
> +	    if (dialect & PPC_OPCODE_POWER4)
> +	      break;
> +	    /* Fall through.  */
> +	  case 3:
> +	  case 6:
> +	  case 7:
> +	    *errmsg = _("illegal L operand value");
> +	    break;
> +	  default:
> +	    break;
> +	  }

So if "(value & mask) != value" then no checks are done?  That doesn't
seem correct.  The same problem occurs later too.

-- 
Alan Modra
Australia Development Lab, IBM