[PATCH 3/9] x86: correct MPX insn w/o base or index encoding in 16-bit mode

Jan Beulich jbeulich@suse.com
Wed Mar 4 12:58:00 GMT 2020


On 04.03.2020 12:54, H.J. Lu wrote:
> On Wed, Mar 4, 2020 at 3:50 AM Jan Beulich <jbeulich@suse.com> wrote:
>>
>> On 04.03.2020 12:45, H.J. Lu wrote:
>>> On Wed, Mar 4, 2020 at 1:38 AM Jan Beulich <jbeulich@suse.com> wrote:
>>>> --- a/gas/config/tc-i386.c
>>>> +++ b/gas/config/tc-i386.c
>>>> @@ -10297,6 +10297,21 @@ i386_addressing_mode (void)
>>>>
>>>>    if (i.prefix[ADDR_PREFIX])
>>>>      addr_mode = flag_code == CODE_32BIT ? CODE_16BIT : CODE_32BIT;
>>>> +  else if (flag_code == CODE_16BIT
>>>> +          && current_templates->start->cpu_flags.bitfield.cpumpx
>>>> +          /* Avoid replacing the "16-bit addressing not allowed" diagnostic
>>>> +             from md_assemble() by "is not a valid base/index expression"
>>>> +             when there is a base and/or index.  */
>>>> +          && !i.types[this_operand].bitfield.baseindex)
>>>> +    {
>>>> +      /* MPX insn memory operands with neither base nor index must be forced
>>>> +        to use 32-bit addressing in 16-bit mode.  */
>>>> +      addr_mode = CODE_32BIT;
>>>> +      i.prefix[ADDR_PREFIX] = ADDR_PREFIX_OPCODE;
>>>> +      ++i.prefixes;
>>>> +      gas_assert (!i.types[this_operand].bitfield.disp16);
>>>> +      gas_assert (!i.types[this_operand].bitfield.disp32);
>>>> +    }
>>>>    else
>>>>      {
>>>
>>> Since MPX isn't available in 16-bit mode, should they be disallowed?
>>
>> How is it not available? As per my understanding, one just needs
>> to use 32-bit addressing.
> 
> 0x67 prefix is special for MPX.  It can't be used as address prefix on MPX
> instructions.

It not only can, but is required to be in 16-bit mode. Let me quote
BNDMK's SDM page:

Protected Mode Exceptions
#UD If the LOCK prefix is used.
If ModRM.r/m encodes BND4-BND7 when Intel MPX is enabled.
If 67H prefix is not used and CS.D=0.
If 67H prefix is used and CS.D=1.

Real-Address Mode Exceptions
#UD If the LOCK prefix is used.
If ModRM.r/m encodes BND4-BND7 when Intel MPX is enabled.
If 16-bit addressing is used.

Virtual-8086 Mode Exceptions
#UD If the LOCK prefix is used.
If ModRM.r/m encodes BND4-BND7 when Intel MPX is enabled.
If 16-bit addressing is used.

It is quite clear to me from this that (a) MPX is allowed
in 16-bit mode (and even in all forms of it, other than
e.g. VEX/EVEX-encoded insns) and (b) the 67 prefix acts
as a normal address size override there. Its use simply is
mandatory in 16-bit mode.

>>> Given that MPX has been deprecated, I prefer an error here.
>>
>> The use of "here" is confusing - just for the broken case (no
>> base/index), or for MPX insns in general? (Asking just in case
>> my understanding expressed above is wrong.)
> 
> flag_code == CODE_16BIT && current_templates->start->cpu_flags.bitfield.cpumpx
> 
> should be an error.

As per above, I see no reason for such behavior.

Jan



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