[PATCH 8/9] x86: drop/replace IgnoreSize
Jan Beulich
jbeulich@suse.com
Wed Mar 4 10:15:00 GMT 2020
Even after commit dc2be329b950 ("i386: Only check suffix in instruction
mnemonic"), by which many of its uses have become unnecessary (some were
unnecessary even before), IgnoreSize is still used for various slightly
different purposes:
- to suppress emission of an operand size prefix,
- in Intel syntax mode to zap "derived" suffixes in certain cases and to
skip certain checks of remaining "derived" suffixes,
- to suppress ambiguous operand size / missing suffix diagnostics,
- for prefixes to suppress the "stand-alone ... prefix" warning.
Drop entirely unnecessary ones and where possible also replace instances
by the more focused (because of having just a single purpose) NoRex64.
To further restrict when IgnoreSize is needed, also generalize the logic
when to skip a template because of a present or derived L or Q suffix,
by skipping immediate operands. Additionally consider mask registers and
VecSIB there.
Note that for the time being the attribute needs to be kept in place on
MMX/SSE/etc insns (but not on VEX/EVEX encoded ones unless an operand
template of them allows for only non-SIMD-register actuals) allowing for
Dword operands - the logic when to emit a data size prefix would need
further adjustment first.
Note also that the memory forms of {,v}pinsrw get their permission for
an L or Q suffix dropped. I can only assume that it being this way was a
cut-and-paste mistake from the register forms, as the latter
specifically have NoRex64 set, and the {,v}pextrw counterparts don't
allow these suffixes either.
Convert VexW= again to their respective VexW* on lines touched anyway.
gas/
2020-03-XX Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (match_template): Extend code in logic
rejecting certain suffixes in certain modes to also cover mask
register use and VecSIB. Drop special casing of broadcast. Skip
immediates in the check.
opcodes/
2020-03-XX Jan Beulich <jbeulich@suse.com>
* i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
* i386-tbl.h: Re-generate.
[resend with actual patch data as compressed attachment, for size reasons]
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