[PATCH] x86: fix processing of -M disassembler option

[Jan Beulich]

Multiple -M options can be specified in any order. Therefore stright
assignment to fields affected needs to be avoided, such that earlier
options' effects won't be discarded. This was in particular a problem
for -Msuffix followed by certain of the other sub-options.

While updating documentation, take the liberty and also drop the
redundant mentioning of being able to comma-separate multiple options.

binutils/
2020-06-XX  Jan Beulich  <jbeulich@suse.com>

	* doc/binutils.texi: Adjust description of x86's -Msuffix. Drop
	redundant text from x86 specific part of -M section.

gas/
2020-06-XX  Jan Beulich  <jbeulich@suse.com>

	* testsuite/gas/i386/nop-1-suffix.d: New.
	* testsuite/gas/i386/i386.exp: Run new test.

opcodes/
2020-06-XX  Jan Beulich  <jbeulich@suse.com>

	* i386-dis.c: (print_insn): Avoid straight assignment to
	priv.orig_sizeflag when processing -M sub-options.

--- a/binutils/doc/binutils.texi
+++ b/binutils/doc/binutils.texi
@@ -2471,8 +2471,7 @@ option or whether instruction notes shou
 disasssembly using @option{-M notes}.
 
 For the x86, some of the options duplicate functions of the @option{-m}
-switch, but allow finer grained control.  Multiple selections from the
-following may be specified as a comma separated string.
+switch, but allow finer grained control.
 @table @code
 @item x86-64
 @itemx i386
@@ -2503,8 +2502,10 @@ will be overridden if @code{x86-64}, @co
 appear later in the option string.
 
 @item suffix
-When in AT&T mode, instructs the disassembler to print a mnemonic
-suffix even when the suffix could be inferred by the operands.
+When in AT&T mode and also for a limited set of instructions when in Intel
+mode, instructs the disassembler to print a mnemonic suffix even when the
+suffix could be inferred by the operands or, for certain instructions, the
+execution mode's defaults.
 @end table
 
 For PowerPC, the @option{-M} argument @option{raw} selects
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -502,6 +502,7 @@ if [expr ([istarget "i*86-*-*"] ||  [ist
     run_dump_test "align-1b"
     run_list_test "inval-pseudo" "-al"
     run_dump_test "nop-1"
+    run_dump_test "nop-1-suffix"
     run_dump_test "nop-2"
     run_dump_test "optimize-1"
     run_dump_test "optimize-1a"
--- /dev/null
+++ b/gas/testsuite/gas/i386/nop-1-suffix.d
@@ -0,0 +1,60 @@
+#objdump: -dwMsuffix,i386
+#name: i386 .nops 1 w/ suffix and forced arch
+#source: nop-1.s
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <single>:
+ +[a-f0-9]+:	90                   	nop
+
+0+1 <pseudo_1>:
+ +[a-f0-9]+:	90                   	nop
+
+0+2 <pseudo_8>:
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	90                   	nop
+
+0+a <pseudo_8_4>:
+ +[a-f0-9]+:	8d 74 26 00          	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d 74 26 00          	leal   0x0\(%esi,%eiz,1\),%esi
+
+0+12 <pseudo_20>:
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d b6 00 00 00 00    	leal   0x0\(%esi\),%esi
+
+0+26 <pseudo_30>:
+ +[a-f0-9]+:	eb 1c                	jmp    44 <pseudo_129>
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+
+0+44 <pseudo_129>:
+ +[a-f0-9]+:	eb 7f                	jmp    c5 <end>
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	8d b4 26 00 00 00 00 	leal   0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+:	90                   	nop
+
+0+c5 <end>:
+ +[a-f0-9]+:	31 c0                	xorl   %eax,%eax
+#pass
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -11851,17 +11851,17 @@ print_insn (bfd_vma pc, disassemble_info
       else if (CONST_STRNEQ (p, "x86-64"))
 	{
 	  address_mode = mode_64bit;
-	  priv.orig_sizeflag = AFLAG | DFLAG;
+	  priv.orig_sizeflag |= AFLAG | DFLAG;
 	}
       else if (CONST_STRNEQ (p, "i386"))
 	{
 	  address_mode = mode_32bit;
-	  priv.orig_sizeflag = AFLAG | DFLAG;
+	  priv.orig_sizeflag |= AFLAG | DFLAG;
 	}
       else if (CONST_STRNEQ (p, "i8086"))
 	{
 	  address_mode = mode_16bit;
-	  priv.orig_sizeflag = 0;
+	  priv.orig_sizeflag &= ~(AFLAG | DFLAG);
 	}
       else if (CONST_STRNEQ (p, "intel"))
 	{