x86: Add support for Intel AMX instructions

[Jan Beulich]

On 08.07.2020 10:49, Cui, Lili wrote:

Just two more small things, everything else looks good to me now:

> @@ -6584,12 +6619,18 @@ match_template (char mnem_suffix)
>  	  as_bad (_("unsupported instruction `%s'"),
>  		  current_templates->start->name);
>  	  return NULL;
> +	case invalid_sib_address:
> +	  err_msg = _("invalid SIB address");
> +	  break;
>  	case invalid_vsib_address:
>  	  err_msg = _("invalid VSIB address");
>  	  break;
>  	case invalid_vector_register_set:
>  	  err_msg = _("mask, index, and destination registers must be distinct");
>  	  break;
> +	case invalid_tmm_register_set:
> +	  err_msg = _("tmm register must be distinct");

Would you mind making this e.g. "all tmm registers must be distinct"? At
the very least the plural "registers" should be used imo.

> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-amx-bad.s
> @@ -0,0 +1,40 @@
> +.text
> +	#tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.W = 1 (illegal value).
> +	.byte 0xc4
> +	.byte 0xe2
> +	.byte 0xd2
> +	.byte 0x5c
> +	.byte 0xdc
> +	.fill 0x05, 0x01, 0x90
> +	#tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.L = 1 (illegal value).
> +	.byte 0xc4
> +	.byte 0xe2
> +	.byte 0x56
> +	.byte 0x5c
> +	.byte 0xdc
> +	.fill 0x05, 0x01, 0x90
> +	#tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.R = 0 (illegal value).
> +	.byte 0xc4
> +	.byte 0x62
> +	.byte 0x52
> +	.byte 0x5c
> +	.byte 0xdc
> +	#tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.B = 0 (illegal value).
> +	.byte 0xc4
> +	.byte 0xc2
> +	.byte 0x52
> +	.byte 0x5c
> +	.byte 0xdc
> +	#tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.VVVV = 0110 (illegal value).
> +	.byte 0xc4
> +	.byte 0xe2
> +	.byte 0x32
> +	.byte 0x5c
> +	.byte 0xdc
> +	#tileloadd (%rax),%tmm1 set R/M= 001 (illegal value) without SIB.
> +	.byte 0xc4
> +	.byte 0xe2
> +	.byte 0x7b
> +	.byte 0x4b
> +	.byte 0x09

Depending on whether the disassembler also properly handles the
gather insn restrictions on register choice (I didn't check and
don't know offhand), I think you also want to verify that what

    tdpbssd %tmm1, %tmm1, %tmm0
    tdpbssd %tmm1, %tmm0, %tmm1
    tdpbssd %tmm0, %tmm1, %tmm1

would assemble to if there wasn't the error you've now added,
doesn't disassemble cleanly. (If there's no similar logic for
the gathers, then I wouldn't insist, but merely consider it a
nice-to-have).

Thanks for your patience with my reviews.

Jan