[PATCH 08/11] x86: adjust/correct V*{F,I}{32x8,64x4}

[Jan Beulich]

For all of these only the 512-bit forms are valid, so drop 256-bit ones
from the integer insert/extract variants.

Also replace EXxmmq by the more natural (here) EXymm.

opcodes/
2020-07-XX  Jan Beulich  <jbeulich@suse.com>

	* i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
	vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
	EXymm.
	(vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
	Likewise. Mark 256-bit entries invalid.

--- a/opcodes/i386-dis-evex-len.h
+++ b/opcodes/i386-dis-evex-len.h
@@ -68,7 +68,7 @@ static const struct dis386 evex_len_tabl
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vbroadcastf32x8",	{ XM, EXxmmq }, 0 },
+    { "vbroadcastf32x8",	{ XM, EXymm }, 0 },
   },
 
   /* EVEX_LEN_0F381B_P_2_W_1 */
@@ -103,7 +103,7 @@ static const struct dis386 evex_len_tabl
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vbroadcasti32x8",	{ XM, EXxmmq }, 0 },
+    { "vbroadcasti32x8",	{ XM, EXymm }, 0 },
   },
 
   /* EVEX_LEN_0F385B_P_2_W_1 */
@@ -263,28 +263,28 @@ static const struct dis386 evex_len_tabl
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vinsertf32x8",	{ XM, Vex, EXxmmq, Ib }, 0 },
+    { "vinsertf32x8",	{ XM, Vex, EXymm, Ib }, 0 },
   },
 
   /* EVEX_LEN_0F3A1A_P_2_W_1 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vinsertf64x4",	{ XM, Vex, EXxmmq, Ib }, 0 },
+    { "vinsertf64x4",	{ XM, Vex, EXymm, Ib }, 0 },
   },
 
   /* EVEX_LEN_0F3A1B_P_2_W_0 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vextractf32x8",	{ EXxmmq, XM, Ib }, 0 },
+    { "vextractf32x8",	{ EXymm, XM, Ib }, 0 },
   },
 
   /* EVEX_LEN_0F3A1B_P_2_W_1 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vextractf64x4",	{ EXxmmq, XM, Ib }, 0 },
+    { "vextractf64x4",	{ EXymm, XM, Ib }, 0 },
   },
 
   /* EVEX_LEN_0F3A20_P_2 */
@@ -347,29 +347,29 @@ static const struct dis386 evex_len_tabl
   /* EVEX_LEN_0F3A3A_P_2_W_0 */
   {
     { Bad_Opcode },
-    { "vinserti32x8",	{ XM, Vex, EXxmmq, Ib }, 0 },
-    { "vinserti32x8",	{ XM, Vex, EXxmmq, Ib }, 0 },
+    { Bad_Opcode },
+    { "vinserti32x8",	{ XM, Vex, EXymm, Ib }, 0 },
   },
 
   /* EVEX_LEN_0F3A3A_P_2_W_1 */
   {
     { Bad_Opcode },
-    { "vinserti64x4",	{ XM, Vex, EXxmmq, Ib }, 0 },
-    { "vinserti64x4",	{ XM, Vex, EXxmmq, Ib }, 0 },
+    { Bad_Opcode },
+    { "vinserti64x4",	{ XM, Vex, EXymm, Ib }, 0 },
   },
 
   /* EVEX_LEN_0F3A3B_P_2_W_0 */
   {
     { Bad_Opcode },
-    { "vextracti32x8",	{ EXxmmq, XM, Ib }, 0 },
-    { "vextracti32x8",	{ EXxmmq, XM, Ib }, 0 },
+    { Bad_Opcode },
+    { "vextracti32x8",	{ EXymm, XM, Ib }, 0 },
   },
 
   /* EVEX_LEN_0F3A3B_P_2_W_1 */
   {
     { Bad_Opcode },
-    { "vextracti64x4",	{ EXxmmq, XM, Ib }, 0 },
-    { "vextracti64x4",	{ EXxmmq, XM, Ib }, 0 },
+    { Bad_Opcode },
+    { "vextracti64x4",	{ EXymm, XM, Ib }, 0 },
   },
 
   /* EVEX_LEN_0F3A43_P_2_W_0 */