x86: Add support for Intel AMX instructions

[Cui, Lili]

> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Wednesday, July 1, 2020 6:02 PM
> To: H.J. Lu <hjl.tools@gmail.com>
> Cc: Cui, Lili <lili.cui@intel.com>; binutils@sourceware.org
> Subject: Re: x86: Add support for Intel AMX instructions
> 
> On 30.06.2020 18:36, H.J. Lu wrote:
> > Let's go with what we have and change it to match MASM later.
> 
> Well, at the risk of stating the obvious: We then won't be able to later drop
> the support for what we currently support, at least not easily. But anyway ...
> 
> Jan

Hi Jan,

Thank you for your careful inspection and suggestions, I update the following modifications in the attachment patch.

1.  Delete the dashes, for example use "amx_tile" instead of "amx-tile".
2.  Add TMM register name check when AMX is disabled, or outside of 64-bit mode to check_register()
3.  Modify AMX name to follow suffixes appear in decode order in disassembler.
4. When disable CpuAMX_TILE, other two CpuAMX_* should also be disabled, as amx_tile is the base feature.
5.  Add Modrm to Sibmem, #define Sibmem SIB=SIBMEM|Modrm 
6.  Change "0xf34B"  to "0xf34b"
7.  Change" tilerelease" opcode in to 2 byte and have a value of 0x49c0.
8.  Add VEX128 and VexW0 to all AMX instructions.


Thanks,
Lili.
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